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83 lines
2.3 KiB
83 lines
2.3 KiB
@*****************************************************************************
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@ amplify.S : ARM NEON software amplification
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@*****************************************************************************
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@ Copyright (C) 2012 Rémi Denis-Courmont
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@
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@ This program is free software; you can redistribute it and/or modify
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@ it under the terms of the GNU Lesser General Public License as published by
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@ the Free Software Foundation; either version 2.1 of the License, or
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@ (at your option) any later version.
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@
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@ This program is distributed in the hope that it will be useful,
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@ but WITHOUT ANY WARRANTY; without even the implied warranty of
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@ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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@ GNU Lesser General Public License for more details.
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@
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@ You should have received a copy of the GNU Lesser General Public License
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@ along with this program; if not, write to the Free Software Foundation,
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@ Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301, USA.
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@****************************************************************************/
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#include "asm.S"
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.syntax unified
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#if HAVE_AS_FPU_DIRECTIVE
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.fpu neon
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#endif
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.text
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#define DST r0
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#define SRC r1
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#define SIZE r2
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.align 2
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function amplify_float_arm_neon
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cmp SIZE, #0
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it eq
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bxeq lr
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#ifdef __ARM_PCS
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vmov s0, r3 @ softfp
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#endif
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pld [SRC, #64]
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vld1.f32 {d16-d17}, [SRC,:128]!
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subs SIZE, SIZE, #16
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vmul.f32 d16, d16, d0[0]
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vmul.f32 d17, d17, d0[0]
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blo 5f
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pld [SRC, #64]
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vld1.f32 {d18-d19}, [SRC,:128]!
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subs SIZE, SIZE, #16
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vmul.f32 d18, d18, d0[0]
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vmul.f32 d19, d19, d0[0]
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blo 2f
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1: @ main loop starts
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pld [SRC, #64]
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vld1.f32 {d20-d21}, [SRC,:128]!
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subs SIZE, SIZE, #16
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vmul.f32 d20, d20, d0[0]
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vmul.f32 d21, d21, d0[0]
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vst1.f32 {d16-d17}, [DST,:128]!
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blo 3f
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pld [SRC, #64]
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vld1.f32 {d16-d17}, [SRC,:128]!
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subs SIZE, SIZE, #16
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vmul.f32 d16, d16, d0[0]
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vmul.f32 d17, d17, d0[0]
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vst1.f32 {d18-d19}, [DST,:128]!
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blo 4f
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pld [SRC, #64]
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vld1.f32 {d18-d19}, [SRC,:128]!
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subs SIZE, SIZE, #16
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vmul.f32 d18, d18, d0[0]
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vmul.f32 d19, d19, d0[0]
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vst1.f32 {d20-d21}, [DST,:128]!
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bhi 1b
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@ main loop ends
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2: vst1.f32 {d16-d17}, [DST,:128]!
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vst1.f32 {d18-d19}, [DST,:128]!
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bx lr
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3: vst1.f32 {d18-d19}, [DST,:128]!
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vst1.f32 {d20-d21}, [DST,:128]!
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bx lr
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4: vst1.f32 {d20-d21}, [DST,:128]!
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5: vst1.f32 {d16-d17}, [DST,:128]!
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bx lr
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