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147 lines
3.4 KiB
147 lines
3.4 KiB
#include "mtrap.h"
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#include "atomic.h"
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#include "vm.h"
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#include "fp_emulation.h"
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#include <string.h>
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#include <limits.h>
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pte_t* root_page_table;
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uintptr_t first_free_paddr;
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uintptr_t mem_size;
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uintptr_t num_harts;
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volatile uint64_t* mtime;
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volatile uint16_t* plic_priorities;
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size_t plic_ndevs;
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static void mstatus_init()
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{
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// Enable FPU and set VM mode
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uintptr_t ms = 0;
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ms = INSERT_FIELD(ms, MSTATUS_VM, VM_CHOICE);
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ms = INSERT_FIELD(ms, MSTATUS_FS, 1);
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write_csr(mstatus, ms);
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// Make sure the hart actually supports the VM mode we want
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ms = read_csr(mstatus);
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assert(EXTRACT_FIELD(ms, MSTATUS_VM) == VM_CHOICE);
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// Enable user/supervisor use of perf counters
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write_csr(mucounteren, -1);
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write_csr(mscounteren, -1);
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write_csr(mie, ~MIP_MTIP); // disable timer; enable other interrupts
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}
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// send S-mode interrupts and most exceptions straight to S-mode
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static void delegate_traps()
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{
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uintptr_t interrupts = MIP_SSIP | MIP_STIP | MIP_SEIP;
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uintptr_t exceptions =
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(1U << CAUSE_MISALIGNED_FETCH) |
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(1U << CAUSE_FAULT_FETCH) |
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(1U << CAUSE_BREAKPOINT) |
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(1U << CAUSE_FAULT_LOAD) |
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(1U << CAUSE_FAULT_STORE) |
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(1U << CAUSE_BREAKPOINT) |
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(1U << CAUSE_USER_ECALL);
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write_csr(mideleg, interrupts);
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write_csr(medeleg, exceptions);
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assert(read_csr(mideleg) == interrupts);
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assert(read_csr(medeleg) == exceptions);
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}
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static void fp_init()
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{
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assert(read_csr(mstatus) & MSTATUS_FS);
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#ifdef __riscv_hard_float
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if (!supports_extension('D'))
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die("FPU not found; recompile pk with -msoft-float");
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for (int i = 0; i < 32; i++)
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init_fp_reg(i);
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write_csr(fcsr, 0);
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#else
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if (supports_extension('D'))
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die("FPU unexpectedly found; recompile with -mhard-float");
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#endif
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}
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hls_t* hls_init(uintptr_t id)
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{
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hls_t* hls = OTHER_HLS(id);
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memset(hls, 0, sizeof(*hls));
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return hls;
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}
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static uintptr_t sbi_top_paddr()
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{
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extern char _end;
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return ROUNDUP((uintptr_t)&_end, RISCV_PGSIZE);
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}
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static void memory_init()
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{
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mem_size = mem_size / MEGAPAGE_SIZE * MEGAPAGE_SIZE;
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first_free_paddr = sbi_top_paddr() + num_harts * RISCV_PGSIZE;
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}
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static void hart_init()
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{
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mstatus_init();
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fp_init();
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delegate_traps();
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}
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static void plic_init()
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{
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for (size_t i = 1; i <= plic_ndevs; i++)
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plic_priorities[i] = 1;
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}
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static void hart_plic_init()
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{
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if (!plic_ndevs)
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return;
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size_t ie_words = plic_ndevs / sizeof(uintptr_t) + 1;
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for (size_t i = 0; i < ie_words; i++)
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HLS()->plic_s_ie[i] = ULONG_MAX;
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*HLS()->plic_m_thresh = 1;
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*HLS()->plic_s_thresh = 0;
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}
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void init_first_hart()
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{
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hart_init();
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hls_init(0); // this might get called again from parse_config_string
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parse_config_string();
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plic_init();
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hart_plic_init();
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memory_init();
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boot_loader();
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}
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void init_other_hart()
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{
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hart_init();
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// wait until hart 0 discovers us
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while (*(uint64_t * volatile *)&HLS()->timecmp == NULL)
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;
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hart_plic_init();
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boot_other_hart();
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}
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void enter_supervisor_mode(void (*fn)(uintptr_t), uintptr_t stack)
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{
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uintptr_t mstatus = read_csr(mstatus);
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mstatus = INSERT_FIELD(mstatus, MSTATUS_MPP, PRV_S);
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mstatus = INSERT_FIELD(mstatus, MSTATUS_MPIE, 0);
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write_csr(mstatus, mstatus);
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write_csr(mscratch, MACHINE_STACK_TOP() - MENTRY_FRAME_SIZE);
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write_csr(mepc, fn);
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write_csr(sptbr, (uintptr_t)root_page_table >> RISCV_PGSHIFT);
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asm volatile ("mv a0, %0; mv sp, %0; mret" : : "r" (stack));
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__builtin_unreachable();
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}
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