Previously, the pk would always run from virtual address MEM_START.
Instead, remap it into the negative virtual addresses, allowing user
processes to expand beyond MEM_START.
* add device tree in elf, using --with-dts to add the absolute path of device tree
* Disable device tree filter
* Remove *.dtb dependence, when the --with-dts option is not used
While it's unused upstream, according to the SiFive FU540 document, the
UART divisor register is at offset 0x18.
This also maps the interrupt enable and interrupt pending register
offsets.
QEMU's finisher is "sifive,test1\0sifive,test0\0syscon" so we fail to
detect it currently. Instead, search the entire list, and for
completeness do the same with the HTIF and SiFive UART drivers.
We expect the firmware to load the external payload at the second
megapage, and that there is space to put the filtered FDT at 0x2200000
past the start of memory. With a default MEM_START of 0x80000000, this
matches the standard OpenSBI values for FW_JUMP_ADDR and
FW_JUMP_FDT_ADDR of 0x80400000/0x80200000 (RV32/RV64) and 0x82200000
respectively, so payloads linked for one should work with the other.
This attempt at rounding leads to wrong results, for example:
314689951 cycles
314690101 instructions
0.90 CPI
With my change results in:
314689951 cycles
314690101 instructions
0.99 CPI
I think this was supposed to be part of rounding behaviour but it doesn't work if only the final digit does it and there is no carry...
Instead I changed it to truncate after the second digit
Some ELF loaders, in particular gdb's load command for dynamically
loading files into memory, which is often used to load binaries onto
FPGAs over JTAG, do not zero out BSS, leaving the memory in whatever
state it was previously in. Thus, introduce a new --enable-zero-bss
configure flag, which will include code to zero out BSS when booting.
* Added --with-abi configure option
* Revised to preserve original semantics when user specifies --with-arch but not --with-abi or when the user specifies --with-arch but not --host.
SV32 is presented in RISC-V Privileged Architecture Manual (version
20190608-Priv-MSU-Ratified) Section 4.3 for RV32 systems. However, BBL
responds to sv32 with:
hart_filter_mask saw unknown hart type: status="okay", mmu_type="riscv,sv32"
and hangs.
This patch is adopted from the original 'riscv-pk.diff' patch written
by Fabrice Bellard, distributed as part of the following tarball:
https://bellard.org/tinyemu/diskimage-linux-riscv-2018-09-23.tar.gz
Closes: https://github.com/riscv/riscv-pk/issues/160
Andrew Waterman
huaixv
gsomlo
Marcus Comstedt
Yan
Howard Mao
Alexander Richardson
Nicholas O'Brien
Jessica Clarke
Kito Cheng
davidmetz
Nick Knight
Jonathan Kimmitt
Gokturk Yuksek
Luís Marques
dskwe
Palmer Dabbelt
Palmer Dabbelt