0eface07b9
Use panic, not die, to terminate elf loader
10 years ago
b94c7a4b07
Refactor pk, bbl, machine into separate libraries
Yuck.
10 years ago
f5a96732cb
Fix ifdef guard on FCSR instructions
10 years ago
33ed6c6c5e
get rid of struct mainvars
10 years ago
80447e5711
Disentangle PK and BBL a bit
10 years ago
bbc9a65fed
Begin refactoring emulation code
10 years ago
82dcccf73c
Don't request KB interrupt til first call to sbi_console_getchar
10 years ago
3dd00b900c
Simplify boot code
10 years ago
802f0cf1b5
fix medeleg typo
10 years ago
fba40b7a8c
Use new counter-enable CSRs
10 years ago
5e29b5ccff
Use RV configuration string instead of device tree
10 years ago
dea1fa15f2
Fix vsnprintf infinite loop
10 years ago
39c89b7db5
WIP on priv spec v1.9
10 years ago
d2d2e0a55c
Remove SBI HTIF support; add console_getchar
10 years ago
75471727f8
New definitions of misa/marchid/mvendorid
10 years ago
4991166b0c
Use simpler, less-general IPI interface
No need for active messages in this context.
10 years ago
bf9ee5ca11
simplify pk atomics and add atomic_or
10 years ago
573c7d3f12
fix comment
10 years ago
28d64a2227
Add SBI calls for remote I$/TLB flushes
10 years ago
26a9320050
sptbr now holds a PPN, not an address
10 years ago
3c0620321d
WIP on priv spec v1.9
10 years ago
e984b263e0
Cap main memory size at 2 GiB for RV32
This works around HTIF limitations and can later be removed.
10 years ago
a844b59be2
Remove sbi_printk macro
10 years ago
ef524be394
S-mode shouldn't ever see misaligned load traps
10 years ago
d00cb5a541
Rely on __riscv_muldiv and __riscv_hard_float macros
10 years ago
b0d83d2a84
Fix MULW/DIVW/etc. emulation code
10 years ago
57cbf902c9
Remove --disable-atomics flag; rely on -march setting instead
10 years ago
ad7a60abea
WIP on priv spec v1.9
10 years ago
1d78c4a12e
Simplify status register reloading in pk
10 years ago
ba74319214
Avoid needless IRQ enable/disable
10 years ago
d340b4271b
Add SBI calls for IRQ mask/unmask
10 years ago
7016bac5df
Fix struct stat size mismatch for RV32
10 years ago
31ad71b8a4
Remove incorrect code supporting ELF32 on RV64 and vice-versa
This is technically possible by running an RV32 supervisor on an
RV64 machine, but the M-mode and S-mode code would need to be
compiled and linked separately.
10 years ago
676c953b79
add renameat syscall
10 years ago
85ae17aa14
Write 1 to MIPI, not 0
10 years ago
529a6a3a0c
Change boot procedure to not rely on IPIs
That procedure doesn't work correctly if hart 0 comes out of reset while
hart 1 is still in reset.
10 years ago
d37b50edf5
Don't rely on arpa/inet.h; newlib doesn't provide it
10 years ago
6300bfbbf8
Fix --disable-fp-emulation.
11 years ago
b9961802ce
Fix macros for emulating atomic operations (--disable-atomics).
11 years ago
4de5ecc39b
Add missing #include for config.h
11 years ago
197a8b81e4
Use IPIs to wake up harts
This has the side effect of testing the IPI mechanism. Still not sure
this is the best approach to booting, but it works...
11 years ago
47f9e06fc2
Read and use devicetree -- THIS BREAKS ROCKET FOR NOW
11 years ago
9cc6732d80
print PC of failed assertions
11 years ago
fa1b729581
fix pte_create to deal with protection bits correctly
11 years ago
69b5de4ffa
Initialize FCSR on boot
11 years ago
09565f7353
Initialize mtimecmp for debuggability
11 years ago
6fb355c58c
Increase VMR limit for SPEC
11 years ago
4a37572381
Add ftruncate syscall
11 years ago
18efb61dc4
Zero-initialize x-registers for debuggability
11 years ago
cc3a93bf30
Stub out a few system calls
11 years ago
Andrew Waterman
Colin Schmidt
Darius Rad
Yunsup Lee