9774e92186
support emulation of misaligned vector loads/stores
2 years ago
10a0b7b1b0
Support emulation of misaligned FLH/FSH
2 years ago
bd29db434d
Fix emulation of misaligned c.swsp/c.sdsp with rd=x0
2 years ago
bfd4044f67
support emulation of misaligned vector loads/stores
2 years ago
b190bef030
Support emulation of misaligned FLH/FSH
2 years ago
fb9d13a695
Fix emulation of misaligned c.swsp/c.sdsp with rd=x0
2 years ago
e06e62f4a4
machine: replace `mbadaddr` with `mtval` ( #242 )
The LLVM IAS does not support the older name for the `mtval` CSR. This
updates the name to the current spelling, which is required to build
with the LLVM IAS. This remains compatible with binutils as well.
5 years ago
1f2e2b3b8d
Fix emulation of misaligned access on big endian target ( #224 )
5 years ago
92434c4f69
Delegate misaligned AMOs as access exceptions, not misaligned
This indicates the access is actually invalid, i.e., should not
be emulated.
7 years ago
16476bd821
Properly license all nontrivial files
8 years ago
57bb80fb7d
Fix emulation of misaligned RVC loads/stores
We were accidentally advancing the PC by 4, not 2.
9 years ago
15a111444d
Emulate RVFC instructions
9 years ago
f6b2274af4
avoid non-standard predefined macros
9 years ago
7272e3f9bc
Handle misaligned loads in ascending order of byte address
10 years ago
de16a763e6
Use mbadaddr to speed up misaligned ld/st emulation
10 years ago
ccf79891f0
Factor emulation routines into multiple files
10 years ago
Andrew Waterman
Saleem Abdulrasool
Marcus Comstedt
Andrew Waterman