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@ -95,7 +95,9 @@ static void hart_init() |
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{ |
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mstatus_init(); |
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fp_init(); |
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#ifndef BBL_BOOT_MACHINE |
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delegate_traps(); |
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#endif /* BBL_BOOT_MACHINE */ |
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} |
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static void plic_init() |
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@ -184,7 +186,7 @@ void init_other_hart(uintptr_t hartid, uintptr_t dtb) |
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boot_other_hart(dtb); |
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} |
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void enter_supervisor_mode(void (*fn)(uintptr_t), uintptr_t arg0, uintptr_t arg1) |
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static inline void setup_pmp(void) |
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{ |
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// Set up a PMP to permit access to all of memory.
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// Ignore the illegal-instruction trap if PMPs aren't supported.
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@ -196,6 +198,11 @@ void enter_supervisor_mode(void (*fn)(uintptr_t), uintptr_t arg0, uintptr_t arg1 |
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".align 2\n\t" |
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"1: csrw mtvec, t0" |
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: : "r" (pmpc), "r" (-1UL) : "t0"); |
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} |
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void enter_supervisor_mode(void (*fn)(uintptr_t), uintptr_t arg0, uintptr_t arg1) |
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{ |
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setup_pmp(); |
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uintptr_t mstatus = read_csr(mstatus); |
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mstatus = INSERT_FIELD(mstatus, MSTATUS_MPP, PRV_S); |
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@ -213,3 +220,18 @@ void enter_supervisor_mode(void (*fn)(uintptr_t), uintptr_t arg0, uintptr_t arg1 |
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asm volatile ("mret" : : "r" (a0), "r" (a1)); |
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__builtin_unreachable(); |
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} |
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void enter_machine_mode(void (*fn)(uintptr_t, uintptr_t), uintptr_t arg0, uintptr_t arg1) |
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{ |
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setup_pmp(); |
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uintptr_t mstatus = read_csr(mstatus); |
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mstatus = INSERT_FIELD(mstatus, MSTATUS_MPIE, 0); |
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write_csr(mstatus, mstatus); |
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write_csr(mscratch, MACHINE_STACK_TOP() - MENTRY_FRAME_SIZE); |
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/* Jump to the payload's entry point */ |
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fn(arg0, arg1); |
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__builtin_unreachable(); |
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} |
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