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set status register correctly for rv32

eos20
Christopher Celio 14 years ago
parent
commit
d3a541bcee
  1. 4
      pk/riscv-pk.S

4
pk/riscv-pk.S

@ -13,7 +13,11 @@ _start:
add t0, t0, %lo(trap_entry)
mtpcr t0, ASM_CR(PCR_EVEC)
#ifdef __riscv64
li t0, SR_S | SR_PS | SR_ET | SR_EC | SR_S64
#else
li t0, SR_S | SR_PS | SR_ET | SR_EC
#endif
or t1, t0, SR_EF | SR_EV
mtpcr t1, ASM_CR(PCR_SR)
mfpcr t1, ASM_CR(PCR_SR)

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