riscv
/
riscv-pk
mirror of https://github.com/riscv-software-src/riscv-pk.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
Browse Source

Merge [shm]call into ecall, [shm]ret into eret

pull/9/head
Andrew Waterman 11 years ago
parent
40668501fa
commit
a79f62f72a
10 changed files with 131 additions and 118 deletions
Whitespace
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Split View
Diff Options
Show Stats Download Patch File Download Diff File
  1. 41
      pk/encoding.h
  2. 6
      pk/frontend.c
  3. 2
      pk/handlers.c
  4. 15
      pk/hcall.h
  5. 5
      pk/init.c
  6. 15
      pk/mcall.h
  7. 111
      pk/mentry.S
  8. 26
      pk/mtrap.c
  9. 24
      pk/sbi_entry.S
  10. 4
      pk/sbi_impl.c

41
pk/encoding.h
View File

@ -150,14 +150,10 @@
#define MASK_AMOMAX_D 0xf800707f
#define MATCH_BLTU 0x6063
#define MASK_BLTU 0x707f
#define MATCH_FCLASS_S 0xe0001053
#define MASK_FCLASS_S 0xfff0707f
#define MATCH_FSGNJN_D 0x22001053
#define MASK_FSGNJN_D 0xfe00707f
#define MATCH_HCALL 0x10000073
#define MASK_HCALL 0xffffffff
#define MATCH_MRET 0x30200073
#define MASK_MRET 0xffffffff
#define MATCH_FMIN_S 0x28000053
#define MASK_FMIN_S 0xfe00707f
#define MATCH_CSRRW 0x1073
#define MASK_CSRRW 0x707f
#define MATCH_SLLIW 0x101b
@ -244,9 +240,9 @@
#define MASK_BLT 0x707f
#define MATCH_SCALL 0x73
#define MASK_SCALL 0xffffffff
#define MATCH_FMIN_S 0x28000053
#define MASK_FMIN_S 0xfe00707f
#define MATCH_SFENCE_VM 0x10400073
#define MATCH_FCLASS_S 0xe0001053
#define MASK_FCLASS_S 0xfff0707f
#define MATCH_SFENCE_VM 0x10100073
#define MASK_SFENCE_VM 0xfff07fff
#define MATCH_SC_W 0x1800202f
#define MASK_SC_W 0xf800707f
@ -264,8 +260,6 @@
#define MASK_MULH 0xfe00707f
#define MATCH_FMUL_S 0x10000053
#define MASK_FMUL_S 0xfe00007f
#define MATCH_MCALL 0x20000073
#define MASK_MCALL 0xffffffff
#define MATCH_CSRRSI 0x6073
#define MASK_CSRRSI 0x707f
#define MATCH_SRAI 0x40005013
@ -306,7 +300,7 @@
#define MASK_FSUB_D 0xfe00007f
#define MATCH_FSGNJX_S 0x20002053
#define MASK_FSGNJX_S 0xfe00707f
#define MATCH_MRTS 0x30900073
#define MATCH_MRTS 0x30500073
#define MASK_MRTS 0xffffffff
#define MATCH_FEQ_D 0xa2002053
#define MASK_FEQ_D 0xfe00707f
@ -334,7 +328,7 @@
#define MASK_ANDI 0x707f
#define MATCH_FMV_X_S 0xe0000053
#define MASK_FMV_X_S 0xfff0707f
#define MATCH_SRET 0x10200073
#define MATCH_SRET 0x10000073
#define MASK_SRET 0xffffffff
#define MATCH_FNMADD_S 0x4f
#define MASK_FNMADD_S 0x600007f
@ -516,14 +510,12 @@
#define CAUSE_MISALIGNED_FETCH 0x0
#define CAUSE_FAULT_FETCH 0x1
#define CAUSE_ILLEGAL_INSTRUCTION 0x2
#define CAUSE_SCALL 0x4
#define CAUSE_HCALL 0x5
#define CAUSE_MCALL 0x6
#define CAUSE_BREAKPOINT 0x7
#define CAUSE_MISALIGNED_LOAD 0x8
#define CAUSE_FAULT_LOAD 0x9
#define CAUSE_MISALIGNED_STORE 0xa
#define CAUSE_FAULT_STORE 0xb
#define CAUSE_MISALIGNED_LOAD 0x4
#define CAUSE_FAULT_LOAD 0x5
#define CAUSE_MISALIGNED_STORE 0x6
#define CAUSE_FAULT_STORE 0x7
#define CAUSE_ECALL 0x8
#define CAUSE_BREAKPOINT 0x9
#endif
#ifdef DECLARE_INSN
DECLARE_INSN(fmv_s_x, MATCH_FMV_S_X, MASK_FMV_S_X)
@ -532,10 +524,8 @@ DECLARE_INSN(remuw, MATCH_REMUW, MASK_REMUW)
DECLARE_INSN(fmin_d, MATCH_FMIN_D, MASK_FMIN_D)
DECLARE_INSN(amomax_d, MATCH_AMOMAX_D, MASK_AMOMAX_D)
DECLARE_INSN(bltu, MATCH_BLTU, MASK_BLTU)
DECLARE_INSN(fclass_s, MATCH_FCLASS_S, MASK_FCLASS_S)
DECLARE_INSN(fsgnjn_d, MATCH_FSGNJN_D, MASK_FSGNJN_D)
DECLARE_INSN(hcall, MATCH_HCALL, MASK_HCALL)
DECLARE_INSN(mret, MATCH_MRET, MASK_MRET)
DECLARE_INSN(fmin_s, MATCH_FMIN_S, MASK_FMIN_S)
DECLARE_INSN(csrrw, MATCH_CSRRW, MASK_CSRRW)
DECLARE_INSN(slliw, MATCH_SLLIW, MASK_SLLIW)
DECLARE_INSN(lb, MATCH_LB, MASK_LB)
@ -579,7 +569,7 @@ DECLARE_INSN(xor, MATCH_XOR, MASK_XOR)
DECLARE_INSN(sub, MATCH_SUB, MASK_SUB)
DECLARE_INSN(blt, MATCH_BLT, MASK_BLT)
DECLARE_INSN(scall, MATCH_SCALL, MASK_SCALL)
DECLARE_INSN(fmin_s, MATCH_FMIN_S, MASK_FMIN_S)
DECLARE_INSN(fclass_s, MATCH_FCLASS_S, MASK_FCLASS_S)
DECLARE_INSN(sfence_vm, MATCH_SFENCE_VM, MASK_SFENCE_VM)
DECLARE_INSN(sc_w, MATCH_SC_W, MASK_SC_W)
DECLARE_INSN(rem, MATCH_REM, MASK_REM)
@ -589,7 +579,6 @@ DECLARE_INSN(csrrci, MATCH_CSRRCI, MASK_CSRRCI)
DECLARE_INSN(addi, MATCH_ADDI, MASK_ADDI)
DECLARE_INSN(mulh, MATCH_MULH, MASK_MULH)
DECLARE_INSN(fmul_s, MATCH_FMUL_S, MASK_FMUL_S)
DECLARE_INSN(mcall, MATCH_MCALL, MASK_MCALL)
DECLARE_INSN(csrrsi, MATCH_CSRRSI, MASK_CSRRSI)
DECLARE_INSN(srai, MATCH_SRAI, MASK_SRAI)
DECLARE_INSN(amoand_d, MATCH_AMOAND_D, MASK_AMOAND_D)

6
pk/frontend.c
View File

@ -4,7 +4,7 @@
#include "atomic.h"
#include "frontend.h"
#include "sbi.h"
#include "hcall.h"
#include "mcall.h"
#include <stdint.h>
uint64_t tohost_sync(unsigned dev, unsigned cmd, uint64_t payload)
@ -13,8 +13,8 @@ uint64_t tohost_sync(unsigned dev, unsigned cmd, uint64_t payload)
__sync_synchronize();
sbi_device_message m = {dev, cmd, payload}, *p;
do_hcall(HCALL_SEND_DEVICE_REQUEST, &m);
while ((p = (void*)do_hcall(HCALL_RECEIVE_DEVICE_RESPONSE)) == 0);
do_mcall(MCALL_SEND_DEVICE_REQUEST, &m);
while ((p = (void*)do_mcall(MCALL_RECEIVE_DEVICE_RESPONSE)) == 0);
kassert(p == &m);
__sync_synchronize();

2
pk/handlers.c
View File

@ -96,7 +96,7 @@ void handle_trap(trapframe_t* tf)
[CAUSE_MISALIGNED_FETCH] = handle_misaligned_fetch,
[CAUSE_FAULT_FETCH] = handle_fault_fetch,
[CAUSE_ILLEGAL_INSTRUCTION] = handle_illegal_instruction,
[CAUSE_SCALL] = handle_syscall,
[CAUSE_ECALL] = handle_syscall,
[CAUSE_BREAKPOINT] = handle_breakpoint,
[CAUSE_MISALIGNED_LOAD] = handle_misaligned_load,
[CAUSE_MISALIGNED_STORE] = handle_misaligned_store,

15
pk/hcall.h
View File

@ -1,15 +0,0 @@
#ifndef _PK_HCALL_H
#define _PK_HCALL_H
#define HCALL_HART_ID 0
#define HCALL_CONSOLE_PUTCHAR 1
#define HCALL_SEND_DEVICE_REQUEST 2
#define HCALL_RECEIVE_DEVICE_RESPONSE 3
#ifndef __ASSEMBLER__
extern uintptr_t do_hcall(uintptr_t which, ...);
#endif
#endif

5
pk/init.c
View File

@ -44,6 +44,7 @@ static void handle_option(const char* s)
case 'm': // memory capacity in MiB
{
uintptr_t mem_mb = atol(&s[2]);
mem_mb = 64;
if (!mem_mb)
goto need_nonzero_int;
mem_size = mem_mb << 20;
@ -94,12 +95,12 @@ uintptr_t boot_loader(struct mainvars* args)
if (current.is_supervisor) {
supervisor_vm_init();
write_csr(mepc, current.entry);
asm volatile("mret");
asm volatile("eret");
__builtin_unreachable();
}
pk_vm_init();
asm volatile("la t0, 1f; csrw mepc, t0; mret; 1:" ::: "t0");
asm volatile("la t0, 1f; csrw mepc, t0; eret; 1:" ::: "t0");
// copy phdrs to user stack
size_t stack_top = current.stack_top - current.phdr_size;

15
pk/mcall.h
View File

@ -0,0 +1,15 @@
#ifndef _PK_MCALL_H
#define _PK_MCALL_H
#define MCALL_HART_ID 0
#define MCALL_CONSOLE_PUTCHAR 1
#define MCALL_SEND_DEVICE_REQUEST 2
#define MCALL_RECEIVE_DEVICE_RESPONSE 3
#ifndef __ASSEMBLER__
extern uintptr_t do_mcall(uintptr_t which, ...);
#endif
#endif

111
pk/mentry.S
View File

@ -2,19 +2,41 @@
#include "mtrap.h"
#define HANDLE_TRAP_IN_MACHINE_MODE 0 \
| (0 << (31- 0)) /* IF misaligned */ \
| (0 << (31- 1)) /* IF fault */ \
| (1 << (31- 2)) /* illegal instruction */ \
| (1 << (31- 3)) /* reserved */ \
| (0 << (31- 4)) /* system call */ \
| (1 << (31- 5)) /* hypervisor call */ \
| (1 << (31- 6)) /* machine call */ \
| (0 << (31- 7)) /* breakpoint */ \
| (1 << (31- 8)) /* load misaligned */ \
| (0 << (31- 9)) /* load fault */ \
| (1 << (31-10)) /* store misaligned */ \
| (0 << (31-11)) /* store fault */
#define HANDLE_USER_TRAP_IN_MACHINE_MODE 0 \
| (0 << (31- 0)) /* IF misaligned */ \
| (0 << (31- 1)) /* IF fault */ \
| (1 << (31- 2)) /* illegal instruction */ \
| (1 << (31- 3)) /* reserved */ \
| (1 << (31- 4)) /* load misaligned */ \
| (0 << (31- 5)) /* load fault */ \
| (1 << (31- 6)) /* store misaligned */ \
| (0 << (31- 7)) /* store fault */ \
| (0 << (31- 8)) /* environment call */ \
| (0 << (31- 9)) /* breakpoint */ \
#define HANDLE_SUPERVISOR_TRAP_IN_MACHINE_MODE 0 \
| (0 << (31- 0)) /* IF misaligned */ \
| (0 << (31- 1)) /* IF fault */ \
| (1 << (31- 2)) /* illegal instruction */ \
| (1 << (31- 3)) /* reserved */ \
| (1 << (31- 4)) /* load misaligned */ \
| (0 << (31- 5)) /* load fault */ \
| (1 << (31- 6)) /* store misaligned */ \
| (0 << (31- 7)) /* store fault */ \
| (1 << (31- 8)) /* environment call */ \
| (0 << (31- 9)) /* breakpoint */ \
#define HANDLE_MACHINE_TRAP_IN_MACHINE_MODE 0 \
| (0 << (31- 0)) /* IF misaligned */ \
| (0 << (31- 1)) /* IF fault */ \
| (0 << (31- 2)) /* illegal instruction */ \
| (0 << (31- 3)) /* reserved */ \
| (0 << (31- 4)) /* load misaligned */ \
| (1 << (31- 5)) /* load fault */ \
| (0 << (31- 6)) /* store misaligned */ \
| (1 << (31- 7)) /* store fault */ \
| (1 << (31- 8)) /* environment call */ \
| (0 << (31- 9)) /* breakpoint */ \
.section .text.init,"ax",@progbits
.globl mentry
@ -28,7 +50,7 @@ mentry:
csrr a0, mcause
bltz a0, .Linterrupt
li a1, HANDLE_TRAP_IN_MACHINE_MODE
li a1, HANDLE_USER_TRAP_IN_MACHINE_MODE
SLL32 a1, a1, a0
bltz a1, .Lhandle_trap_in_machine_mode
@ -48,13 +70,11 @@ mentry:
csrr a0, mcause
bltz a0, .Linterrupt
li a1, HANDLE_TRAP_IN_MACHINE_MODE
li a1, HANDLE_SUPERVISOR_TRAP_IN_MACHINE_MODE
SLL32 a1, a1, a0
bltz a1, .Lhandle_trap_in_machine_mode
.Linterrupt_in_supervisor:
# For now, direct all interrupts to supervisor mode.
# Detect double faults.
csrr a0, mstatus
SLL32 a0, a0, 31 - CONST_CTZ(MSTATUS_PRV2)
@ -78,16 +98,21 @@ mentry:
STORE a1,11*REGBYTES(sp)
csrr a0, mcause
li a1, CAUSE_HCALL
beq a0, a1, .Lhandle_trap_in_machine_mode
li a1, CAUSE_FAULT_LOAD
beq a0, a1, .Lhandle_trap_in_machine_mode
li a1, CAUSE_FAULT_STORE
beq a0, a1, .Lhandle_trap_in_machine_mode
li a1, HANDLE_MACHINE_TRAP_IN_MACHINE_MODE
SLL32 a1, a1, a0
bltz a1, .Lhandle_trap_in_machine_mode
# Uh oh...
.Lbad_trap:
j bad_trap
.Lsupervisor_double_fault:
# Return to supervisor trap entry with interrupts disabled.
# Set PRV2=U, IE2=1, PRV1=S (it already is), and IE1=0.
li a0, MSTATUS_PRV2 | MSTATUS_IE2 | MSTATUS_IE1
csrc mstatus, a0
j .Lreturn_from_supervisor_double_fault
.align 6
# Entry point for power-on reset.
# TODO per-hart stacks
@ -111,27 +136,26 @@ mentry:
# See if this is an IPI; register a supervisor SW interrupt if so.
li a1, IRQ_IPI * 2
bne a0, a1, 1f
csrc mstatus, MSTATUS_MSIP
csrrc a0, mstatus, MSTATUS_MSIP
csrs mstatus, MSTATUS_SSIP
j .Lmrts
# There are three cases: PRV1=U; PRV1=S and IE1=1; and PRV1=S and IE1=0.
# For cases 1-2, do an MRTS; for case 3, we can't, so ERET.
and a0, a0, MSTATUS_PRV1 | MSTATUS_IE1
li a1, (MSTATUS_PRV1 & ~(MSTATUS_PRV1<<1)) * PRV_S
bne a0, a1, .Lmrts
# And then go back whence we came.
LOAD a0, 10*REGBYTES(sp)
LOAD a1, 11*REGBYTES(sp)
csrrw sp, mscratch, sp
eret
1:
# See if this is an HTIF interrupt; if so, handle it in machine mode.
li a1, IRQ_HOST * 2
bne a0, a1, 1f
li a0, 12
j .Lhandle_trap_in_machine_mode
1:
# We don't know how to handle this interrupt. We're hosed.
j bad_trap
.Lsupervisor_double_fault:
# Return to supervisor trap entry with interrupts disabled.
# Set PRV2=U, IE2=1, PRV1=S (it already is), and IE1=0.
li a0, MSTATUS_PRV2 | MSTATUS_IE2 | MSTATUS_IE1
csrc mstatus, a0
j .Lreturn_from_supervisor_double_fault
bne a0, a1, .Lbad_trap
li a0, 10
.Lhandle_trap_in_machine_mode:
# Preserve the registers. Compute the address of the trap handler.
@ -220,7 +244,7 @@ mentry:
LOAD a0, 10*REGBYTES(sp)
csrw mscratch, sp
LOAD sp, 2*REGBYTES(sp)
mret
eret
1:# Redirect the trap to the supervisor.
LOAD a0, 10*REGBYTES(sp)
@ -235,16 +259,15 @@ trap_table:
.word bad_trap
.word illegal_insn_trap
.word bad_trap
.word bad_trap
.word hcall_trap
.word bad_trap
.word bad_trap
.word misaligned_load_trap
.word machine_page_fault
.word misaligned_store_trap
.word machine_page_fault
.word mcall_trap
.word bad_trap
.word htif_interrupt
.word bad_trap
.word bad_trap
.word bad_trap
.word bad_trap
.word bad_trap

26
pk/mtrap.c
View File

@ -1,6 +1,6 @@
#include "mtrap.h"
#include "frontend.h"
#include "hcall.h"
#include "mcall.h"
#include "vm.h"
#include <errno.h>
@ -109,7 +109,7 @@ uintptr_t htif_interrupt(uintptr_t mcause, uintptr_t* regs)
panic("htif: no record");
}
static uintptr_t hcall_console_putchar(uint8_t ch)
static uintptr_t mcall_console_putchar(uint8_t ch)
{
while (swap_csr(tohost, TOHOST_CMD(1, 1, ch)) != 0);
while (1) {
@ -127,9 +127,9 @@ static uintptr_t hcall_console_putchar(uint8_t ch)
#define printm(str, ...) ({ \
char buf[1024], *p = buf; sprintk(buf, str, __VA_ARGS__); \
while (*p) hcall_console_putchar(*p++); })
while (*p) mcall_console_putchar(*p++); })
static uintptr_t hcall_dev_req(sbi_device_message *m)
static uintptr_t mcall_dev_req(sbi_device_message *m)
{
//printm("req %d %p\n", MAILBOX()->device_request_queue_size, m);
#ifndef __riscv64
@ -153,7 +153,7 @@ static uintptr_t hcall_dev_req(sbi_device_message *m)
#endif
}
static uintptr_t hcall_dev_resp()
static uintptr_t mcall_dev_resp()
{
htif_interrupt(0, 0);
@ -168,7 +168,7 @@ static uintptr_t hcall_dev_resp()
return (uintptr_t)m;
}
uintptr_t hcall_trap(uintptr_t mcause, uintptr_t* regs)
uintptr_t mcall_trap(uintptr_t mcause, uintptr_t* regs)
{
if (EXTRACT_FIELD(read_csr(mstatus), MSTATUS_PRV1) < PRV_S)
return -1;
@ -176,17 +176,17 @@ uintptr_t hcall_trap(uintptr_t mcause, uintptr_t* regs)
uintptr_t n = regs[10], arg0 = regs[11], retval;
switch (n)
{
case HCALL_HART_ID:
case MCALL_HART_ID:
retval = 0; // TODO
break;
case HCALL_CONSOLE_PUTCHAR:
retval = hcall_console_putchar(arg0);
case MCALL_CONSOLE_PUTCHAR:
retval = mcall_console_putchar(arg0);
break;
case HCALL_SEND_DEVICE_REQUEST:
retval = hcall_dev_req((sbi_device_message*)arg0);
case MCALL_SEND_DEVICE_REQUEST:
retval = mcall_dev_req((sbi_device_message*)arg0);
break;
case HCALL_RECEIVE_DEVICE_RESPONSE:
retval = hcall_dev_resp();
case MCALL_RECEIVE_DEVICE_RESPONSE:
retval = mcall_dev_resp();
break;
default:
retval = -ENOSYS;

24
pk/sbi_entry.S
View File

@ -1,5 +1,5 @@
#include "encoding.h"
#include "hcall.h"
#include "mcall.h"
.section .sbi,"ax",@progbits
.align RISCV_PGSHIFT
@ -12,8 +12,8 @@ sbi_base:
# hart_id
.align 4
li a0, HCALL_HART_ID
hcall
li a0, MCALL_HART_ID
ecall
ret
# num_harts
@ -28,22 +28,22 @@ sbi_base:
# console_putchar
.align 4
mv a1, a0
li a0, HCALL_CONSOLE_PUTCHAR
hcall
li a0, MCALL_CONSOLE_PUTCHAR
ecall
ret
# send_device_request
.align 4
mv a1, a0
li a0, HCALL_SEND_DEVICE_REQUEST
hcall
li a0, MCALL_SEND_DEVICE_REQUEST
ecall
ret
# receive_device_response
.align 4
mv a1, a0
li a0, HCALL_RECEIVE_DEVICE_RESPONSE
hcall
li a0, MCALL_RECEIVE_DEVICE_RESPONSE
ecall
ret
# send ipi
@ -53,9 +53,9 @@ sbi_base:
# end of SBI trampolines
.globl do_hcall
do_hcall:
hcall
.globl do_mcall
do_mcall:
ecall
ret
.align RISCV_PGSHIFT

4
pk/sbi_impl.c
View File

@ -2,14 +2,14 @@
#include "vm.h"
#include "frontend.h"
#include "sbi.h"
#include "hcall.h"
#include "mcall.h"
#include <errno.h>
#define sbi_printk(str, ...) ({ \
char buf[1024]; /* XXX */ \
sprintk(buf, str, __VA_ARGS__); \
for (size_t i = 0; buf[i]; i++) \
do_hcall(HCALL_CONSOLE_PUTCHAR, buf[i]); })
do_mcall(MCALL_CONSOLE_PUTCHAR, buf[i]); })
uintptr_t __sbi_query_memory(uintptr_t id, memory_block_info *p)
{

Write Preview
Loading…
Cancel
Save