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@ -72,6 +72,8 @@ |
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#define PTE_SR 0x040 // Supervisor Read permission
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#define PTE_SW 0x080 // Supervisor Write permission
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#define PTE_SX 0x100 // Supervisor eXecute permission
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#define PTE_R 0x200 // Referenced
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#define PTE_D 0x400 // Dirty
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#define PTE_PERM (PTE_SR | PTE_SW | PTE_SX | PTE_UR | PTE_UW | PTE_UX) |
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#ifdef __riscv |
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@ -148,10 +150,12 @@ |
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#define MASK_AMOMAX_D 0xf800707f |
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#define MATCH_BLTU 0x6063 |
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#define MASK_BLTU 0x707f |
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#define MATCH_FCLASS_S 0xe0001053 |
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#define MASK_FCLASS_S 0xfff0707f |
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#define MATCH_FSGNJN_D 0x22001053 |
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#define MASK_FSGNJN_D 0xfe00707f |
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#define MATCH_FMIN_S 0x28000053 |
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#define MASK_FMIN_S 0xfe00707f |
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#define MATCH_HCALL 0x10000073 |
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#define MASK_HCALL 0xffffffff |
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#define MATCH_MRET 0x30200073 |
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#define MASK_MRET 0xffffffff |
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#define MATCH_CSRRW 0x1073 |
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@ -240,8 +244,8 @@ |
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#define MASK_BLT 0x707f |
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#define MATCH_SCALL 0x73 |
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#define MASK_SCALL 0xffffffff |
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#define MATCH_FCLASS_S 0xe0001053 |
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#define MASK_FCLASS_S 0xfff0707f |
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#define MATCH_FMIN_S 0x28000053 |
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#define MASK_FMIN_S 0xfe00707f |
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#define MATCH_SFENCE_VM 0x10400073 |
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#define MASK_SFENCE_VM 0xfff07fff |
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#define MATCH_SC_W 0x1800202f |
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@ -528,8 +532,9 @@ DECLARE_INSN(remuw, MATCH_REMUW, MASK_REMUW) |
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DECLARE_INSN(fmin_d, MATCH_FMIN_D, MASK_FMIN_D) |
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DECLARE_INSN(amomax_d, MATCH_AMOMAX_D, MASK_AMOMAX_D) |
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DECLARE_INSN(bltu, MATCH_BLTU, MASK_BLTU) |
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DECLARE_INSN(fclass_s, MATCH_FCLASS_S, MASK_FCLASS_S) |
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DECLARE_INSN(fsgnjn_d, MATCH_FSGNJN_D, MASK_FSGNJN_D) |
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DECLARE_INSN(fmin_s, MATCH_FMIN_S, MASK_FMIN_S) |
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DECLARE_INSN(hcall, MATCH_HCALL, MASK_HCALL) |
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DECLARE_INSN(mret, MATCH_MRET, MASK_MRET) |
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DECLARE_INSN(csrrw, MATCH_CSRRW, MASK_CSRRW) |
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DECLARE_INSN(slliw, MATCH_SLLIW, MASK_SLLIW) |
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@ -574,7 +579,7 @@ DECLARE_INSN(xor, MATCH_XOR, MASK_XOR) |
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DECLARE_INSN(sub, MATCH_SUB, MASK_SUB) |
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DECLARE_INSN(blt, MATCH_BLT, MASK_BLT) |
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DECLARE_INSN(scall, MATCH_SCALL, MASK_SCALL) |
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DECLARE_INSN(fclass_s, MATCH_FCLASS_S, MASK_FCLASS_S) |
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DECLARE_INSN(fmin_s, MATCH_FMIN_S, MASK_FMIN_S) |
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DECLARE_INSN(sfence_vm, MATCH_SFENCE_VM, MASK_SFENCE_VM) |
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DECLARE_INSN(sc_w, MATCH_SC_W, MASK_SC_W) |
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DECLARE_INSN(rem, MATCH_REM, MASK_REM) |
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