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@ -186,7 +186,7 @@ void init_other_hart(uintptr_t hartid, uintptr_t dtb) |
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boot_other_hart(dtb); |
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} |
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void enter_supervisor_mode(void (*fn)(uintptr_t), uintptr_t arg0, uintptr_t arg1) |
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static inline void setup_pmp(void) |
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{ |
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// Set up a PMP to permit access to all of memory.
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// Ignore the illegal-instruction trap if PMPs aren't supported.
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@ -198,6 +198,11 @@ void enter_supervisor_mode(void (*fn)(uintptr_t), uintptr_t arg0, uintptr_t arg1 |
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".align 2\n\t" |
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"1: csrw mtvec, t0" |
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: : "r" (pmpc), "r" (-1UL) : "t0"); |
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} |
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void enter_supervisor_mode(void (*fn)(uintptr_t), uintptr_t arg0, uintptr_t arg1) |
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{ |
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setup_pmp(); |
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uintptr_t mstatus = read_csr(mstatus); |
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mstatus = INSERT_FIELD(mstatus, MSTATUS_MPP, PRV_S); |
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@ -218,16 +223,7 @@ void enter_supervisor_mode(void (*fn)(uintptr_t), uintptr_t arg0, uintptr_t arg1 |
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void enter_machine_mode(void (*fn)(uintptr_t, uintptr_t), uintptr_t arg0, uintptr_t arg1) |
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{ |
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// Set up a PMP to permit access to all of memory.
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// Ignore the illegal-instruction trap if PMPs aren't supported.
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uintptr_t pmpc = PMP_NAPOT | PMP_R | PMP_W | PMP_X; |
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asm volatile ("la t0, 1f\n\t" |
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"csrrw t0, mtvec, t0\n\t" |
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"csrw pmpaddr0, %1\n\t" |
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"csrw pmpcfg0, %0\n\t" |
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".align 2\n\t" |
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"1: csrw mtvec, t0" |
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: : "r" (pmpc), "r" (-1UL) : "t0"); |
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setup_pmp(); |
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uintptr_t mstatus = read_csr(mstatus); |
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mstatus = INSERT_FIELD(mstatus, MSTATUS_MPIE, 0); |
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