Spike, a RISC-V ISA Simulator

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Tree: f2a76d7a3d

arrv-sc-arrv-sc/snippy-tests

confprec

cs250

cycleh

debug_rom

debug_rom_fence

device_flags

dtm_reset_error

dts_parsing

dynamic

eos18-bringup

factor-out-macros

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fix-bf16

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fp-encoding

heterogeneous_mc

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itrigger-etrigger-cleanup

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plic-clint-endian

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riscv-isa-sim/spike_main

History

Nadime Barhoumi 2567e5bd1b Make abstractauto register optional in debug module Add --dm-no-abstractauto flag to disable support for the optional abstractauto register. When disabled, writes to the register are ignored and the internal state is kept at 0. Currently, neither riscv-openocd nor openocd support batch reads or writes for debug modules that don’t implement abstractauto, as both assume every debug module provides abstractauto support. However, work is underway to remove this dependency.		5 months ago
..
spike-log-parser.cc	Fix the remaining few warnings that Clang catches	12 months ago
spike.cc	Make abstractauto register optional in debug module	5 months ago
spike_main.ac	Support setting ISA/subsets with --isa flag	11 years ago
spike_main.mk.in	build: Force inclusion of all symbols from extension.o in spike-main	3 years ago
termios-xspike.cc	Support building from within root directory	11 years ago
xspike.cc	Fix or work around other unused-parameter warnings in ancillary programs	4 years ago