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riscv-isa-sim
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Spike, a RISC-V ISA Simulator
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riscv-isa-sim/rvc
Andrew Waterman 5a97139eee
Rip out RVC for now 		13 years ago
..
insns Rip out RVC for now 13 years ago
README Rip out RVC for now 13 years ago
rvc.h Rip out RVC for now 13 years ago

README 

This directory contains work in progress on RISC-V Compressed (RVC), a 16-bit
instruction encoding for reduced code size.  It is not currently usable.