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Spike, a RISC-V ISA Simulator
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riscv-isa-sim/hwacha/insns_ut_half/ut_fcvt_h_l.h

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require_xpr64;
require_fp;
softfloat_roundingMode = RM;
WRITE_HFRD(i64_to_f32(RS1));
set_fp_exceptions;