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40 lines
779 B
40 lines
779 B
require_supervisor_hwacha;
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reg_t addr = XS1;
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#define LOAD_B(addr) \
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(addr += 1, p->get_mmu()->load_uint8(addr-1))
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#define LOAD_W(addr) \
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(addr += 4, p->get_mmu()->load_uint32(addr-4))
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#define LOAD_D(addr) \
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(addr += 8, p->get_mmu()->load_uint64(addr-8))
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WRITE_NXPR(LOAD_W(addr));
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WRITE_NFPR(LOAD_W(addr));
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WRITE_MAXVL(LOAD_W(addr));
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WRITE_VL(LOAD_W(addr));
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WRITE_UTIDX(LOAD_W(addr));
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addr += 4;
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WRITE_VF_PC(LOAD_D(addr));
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for (uint32_t x=1; x<NXPR; x++) {
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for (uint32_t i=0; i<VL; i++) {
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UT_WRITE_XPR(i, x, LOAD_D(addr));
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}
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}
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for (uint32_t f=0; f<NFPR; f++) {
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for (uint32_t i=0; i<VL; i++) {
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UT_WRITE_FPR(i, f, LOAD_D(addr));
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}
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}
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for (uint32_t i=0; i<VL; i++) {
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h->get_ut_state(i)->run = LOAD_B(addr);
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}
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#undef LOAD_B
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#undef LOAD_W
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#undef LOAD_D
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