Spike, a RISC-V ISA Simulator
You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
 
 
 
 
 
 
liweiwei 42cbf10dc1 add blocksz parameter to specify the cache block size for CBO operations 5 years ago
..
insns Update instruction vmandnot.mm, vmornot.mm -> vmandn.mm, vmorn.mm (#896) 5 years ago
abstract_device.h Refactor headers 6 years ago
arith.h Support RISC-V p-ext-proposal v0.9.2 (#637) 5 years ago
cachesim.cc Add "--log-cache-miss" option to generate a log of cache miss. (#241) 8 years ago
cachesim.h Add "--log-cache-miss" option to generate a log of cache miss. (#241) 8 years ago
clint.cc Convert mip to csr_t family 5 years ago
common.h Add NORETURN macro 5 years ago
csrs.cc TSR is read-only 0 when S-mode is not supported. (#890) 5 years ago
csrs.h Use enum to specify the 3 options for masking of intr CSRs 5 years ago
debug_defines.h fix redefinition of CSR_MCONTEXT and CSR_SCONTEXT 5 years ago
debug_module.cc Changes to be cleaner wrt. -Wextra 5 years ago
debug_module.h Don't say "master" (#898) 5 years ago
debug_rom_defines.h Fix a missed header file in the softfloat include install. 9 years ago
decode.h Add more assertion for fcvt (#910) 5 years ago
devices.cc Fix compile errors 6 years ago
devices.h encoding: udpate and move platform-related define out 5 years ago
disasm.h Changes to be cleaner wrt. -Wextra 5 years ago
dts.cc Fix warning in new dtc 5 years ago
dts.h Refactor headers 6 years ago
encoding.h Fix HINVAL.VVMA and HINVAL.GVMA opcodes 5 years ago
entropy_source.h Zbkx renames xperm.n and xperm.b as xperm4 and xperm8. (#846) 5 years ago
execute.cc Report proper GVA bit on breakpoint traps 5 years ago
extension.cc Set badaddr=0 on illegal instruction traps 10 years ago
extension.h Refer to LICENSE in some newer source files 11 years ago
extensions.cc ext: support default library name and fix isa parser 6 years ago
insn_macros.h Move definitions of P and require macros 5 years ago
insn_template.cc Support RV32E/RV64E base ISAs 5 years ago
insn_template.h rvv: add saturation helper function 7 years ago
interactive.cc Changes to be cleaner wrt. -Wextra 5 years ago
jtag_dtm.cc Implement JTAG BYPASS register. (#697) 5 years ago
jtag_dtm.h Implement JTAG BYPASS register. (#697) 5 years ago
log_file.h Write execution logs to a named log file (#409) 6 years ago
memtracer.h Use enum instead of two bools to denote memory access type 11 years ago
mmio_plugin.h Implement MMIO device plugins. 7 years ago
mmu.cc page fault when PTE_N bit set and not EXT_SVNAPOT (#875) 5 years ago
mmu.h add blocksz parameter to specify the cache block size for CBO operations 5 years ago
opcodes.h Writing non-existent CSRs, access FPRs with mstatus.FS=0 (#311) 7 years ago
platform.h fix typo. (#723) 5 years ago
processor.cc Merge pull request #899 from riscv-software-src/rv32e 5 years ago
processor.h Support RV32E/RV64E base ISAs 5 years ago
remote_bitbang.cc fixing compilation errors on openbsd 8 years ago
remote_bitbang.h debug: move remote_bitbang into riscv 9 years ago
riscv.ac Remove vestiges of legacy RVV SLEN parameter 5 years ago
riscv.mk.in Update instruction vmandnot.mm, vmornot.mm -> vmandn.mm, vmorn.mm (#896) 5 years ago
rocc.cc Refer to LICENSE in some newer source files 11 years ago
rocc.h Support multiple extensions at the same time 6 years ago
rom.cc Remove MTIME[CMP]; add RTC device 10 years ago
sim.cc Don't use "using" 5 years ago
sim.h Fix memory leak 5 years ago
simif.h Adding symbol lookup when --enable-commitlog is enabled (#558) 6 years ago
tracer.h Add facility to instrument specific opcodes 11 years ago
trap.cc WIP on priv spec v1.9 11 years ago
trap.h Add gva field to trap_breakpoint 5 years ago