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28 lines
840 B
28 lines
840 B
/dts-v1/;
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/ {
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#address-cells = <2>;
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#size-cells = <2>;
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cpus { // Container for all CPU cores
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#address-cells = <1>; // CPU children use 1 cell for hartid
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#size-cells = <0>; // CPU children don't specify size
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timebase-frequency = <10000000>; // Timer ticks at 10 MHz (for OS timing)
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CPU0: cpu@0 { // First CPU core (label: CPU0, unit address: 0)
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device_type = "cpu"; // Identifies this as a CPU device
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reg = <0>; // Hartid = 0 (hardware thread ID)
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riscv,isa = "rv64imafdc"; // ISA: RV64 with I,M,A,F,D,C extensions
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};
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x0 0x80000000 0x0 0x20000000>;
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};
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memory@A0000000 {
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device_type = "memory";
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reg = <0x0 0xA0000000 0x0 0x20000000>;
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};
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};
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