Spike, a RISC-V ISA Simulator

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Tree: 1349b73d58

arrv-sc-arrv-sc/snippy-tests

confprec

cs250

cycleh

debug_rom

debug_rom_fence

device_flags

dtm_reset_error

dts_parsing

dynamic

eos18-bringup

factor-out-macros

fetch

fix-2296

fix-bf16

force-rtti

fp-encoding

heterogeneous_mc

hwachav4

increase-stack-size

itrigger-etrigger-cleanup

load_reservation_set_size

log-commits-faster

master

mmio-hack

mvp

no_progbuf

no_progbuf2

nolibfdt

optimized-chunk-size

p-ext-0.5.2

plctlab-plct-zce-fix2

plic-clint-endian

plic_uart_v1

priv-1.10

private-l1-caches

pte-info-and-delegation

remove-tests

rivosinc-etrigger_fix_exception_match

rva-profile-support

sanitize

simplify-misaligned

sodor

sparse-mem

speed2

speedup-hacks

static-link

test

tmp

trigger_priority

tweak_debug_rom

whole-archive

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v1.0.0

v1.1.0

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riscv-isa-sim/ci-tests/snippy-tests

History

Alexander Romanov 0f289394f3 ci: auto-generate per extension snippy tests This way adding new extension tests is as easy as adding 1 line script call and it is much harder to leave some instruction untested		6 months ago
..
boot-code-f.s	ci: add testing with llvm-snippy	7 months ago
boot-code-vf.s	test: add basic random tests for V extension	7 months ago
boot-code.s	ci: add testing with llvm-snippy	7 months ago
generate-snippy-test.sh	ci: auto-generate per extension snippy tests	6 months ago
linker-entry.ld	ci: add testing with llvm-snippy	7 months ago
sections.yaml	ci: auto-generate per extension snippy tests	6 months ago