1. Add EXT_ZICFISS for enable Zicfiss with zicfiss extension name.
2. Add new software exception with tval 3 for shadow stack.
3. Implement sspush_x1/sspush_x5/sspopchk_x1/sspopchk_x5/ssrdp/ssamoswap_w/ssamoswap_d.
4. Implement c_sspush_x1/c_sspopchk_x5 in c_lui.h which has same encoding.
5. Add new special access type ss_access in xlate_flags_t for checking special read/write permission in SS(Shadow Stack) page.
6. Add new ss_load/ss_store/ssamoswap to enable ss_access flag.
7. Check special pte(xwr=010) of SS page.
According to Subset Naming Convention section of ISA Manual Volume I,
H extension should be after V extension in ISA string.
Signed-off-by: demin.han <demin.han@starfivetech.com>
Currently there is a bug with the disassembly when vsetivli/vsetvli have invalid vtypes (with reserved bits set). Spike correctly detects this and sets vill, but the disassembler integrated into spike ignores those bits being set and prints the instruction as if they weren't. This makes debugging harder, it looks like an otherwise valid vtype was being rejected and can lead down debugging paths like thinking the vector unit is configured incorrectly.
This commit changes the behaviour so that if these reserved bits are set, it prints out the hex value of the vtype. This is understood by the assembler.
GCC disassembler prints out the decimal value of the vtype in this case, I think that hex value is clearer but I can change it if desired.
Signed-off-by: Brendan Sweeney <brs@eecs.berkeley.edu>
In general, the strategy has been that the disassembler enables a
maximal set of non-conflicting extensions, thereby doing the right thing
for the largest number of users.
Add disassembler support for all instructions in Zvk extensions:
- Zvbb (bitmanip)
- Zvbc (carryless multiplication)
- Zvkg (GMAC)
- Zvkned (AES)
- Zvknha / Zvknhb (SHA-256, SHA-512)
- Zvksed (SM4)
- Zvksh (SM3)
Macros are used to limit code duplication, following the example
of the base V extension. Because the V extension undefines some
of its macros after their use, there Zvk support does define some
similar macros.
Co-authored-by: Gianluca Guida <gianluca@rivosinc.com>
Signed-off-by: Eric Gouriou <ego@rivosinc.com>
This commit adds the *.pc files for Spike's simulation library,
enabling dynamic and static linking without the need to directly
reference Spike sources. Using Spike as a stand-alone library
provides an interesting option for developing tools
and applications based on Spike.
None of these cases are perf-critical.
It was easy to change one of them to use std::string, but the others
would have required more refactoring. So, simply change them to use
snprintf instead.
The shift amount is 6 bits wide on RV64. As with the base ISA shifts, we
ignore XLEN and unconditionally disassemble the 6-bit immediate on RV32.
Partially reverts da93bdc435
Iterate over the instruction chains in reverse order, prioritizing
the last call to `disassembler_t::add_insn`.
To preserve behavior for the standard instructions, reverse the order
in which we add instructions in the `disassembler_t` constructor.
Supersedes #995.
Andrew Waterman
YenHaoChen
SuHsien Ho
Ming-Yi Lai
Ved Shanbhogue
demin.han
YenHaoChen
brs
Chih-Min Chao
Brendan Sweeney
Atul Khare
Jerry Zhao
Eric Gouriou
Philipp Tomsich
Gianluca Guida
Weiwei Li
Wojciech Bartczak
Neel Gala
Kip Walker
liweiwei90
Yan
Rupert Swarbrick