riscv-isa-sim

Commit Graph

Author	SHA1	Message	Date
Andrew Waterman	344a860ba0	Merge pull request #1724 from chihminchao/cif-sse-fix The senvcfg.SSE will read (only) as zero when menvcfg.SSE is 0	2 years ago
Andrew Waterman	f2181f0406	Merge pull request #1732 from chihminchao/fix-zkr Fix zkr	2 years ago
Binno	ea5138d24d	The senvcfg.SSE will read (only) as zero when menvcfg.SSE is 0	2 years ago
Binno	6dbc8cad8a	zkr: entropy source access control for seed csr	2 years ago
Andrew Waterman	34601fc488	Merge pull request #1736 from YenHaoChen/pr-hlvx-epmp Fix ePMP checking on hlvx instructions	2 years ago
YenHaoChen	229b159465	Fix ePMP checking on hlvx instructions The hlvx instruction must grant PMP permissions of both execution and reading. Thus, with ePMP (mseccfg.MML==1), the hlvx instructions are only permitted with pmpcfg.RWXL=0111 from M-mode.	2 years ago
Andrew Waterman	c0281a17d6	Merge pull request #1735 from chihminchao/deleg-hw-excp excp: support hardware_error_exception delegation	2 years ago
Andrew Waterman	fd141e9a43	Merge pull request #1733 from chihminchao/fix-ssqosid ssqosid: modify permission check condition for srmcfg	2 years ago
Andrew Waterman	985837a602	Merge pull request #1731 from chihminchao/fix-zicfiss Fix zicfiss	2 years ago
Andrew Waterman	4f69177d94	Merge pull request #1730 from riscv-software-src/test-headers Check in CI that all installed headers are usable	2 years ago
Binno	0a4f0b3da6	zkr: enable write for useed/sseed fileds of mseccfg csr	2 years ago
Binno	e9af319bc0	zicfiss: modify check condicton to loads to shadow-stack pages	2 years ago
Binno	0f0c1c1c2a	zicfiss: fix missed throw to store access fault of shadow stack page	2 years ago
Binno	08463028d6	excp: support hardware_error_exception delegation enable M -> S and HS -> VU/VS delegation	2 years ago
Andrew Waterman	aa73432e58	Check in CI that all installed headers are usable	2 years ago
Andrew Waterman	a4924928a7	Add install-hdrs-list.h target Only used by CI tests.	2 years ago
Andrew Waterman	77654f6011	Obtain definition of reg_t in elfloader.h	2 years ago
Andrew Waterman	97a7244371	Avoid dependence on config.h in byteorder.h The runtime check will compile out.	2 years ago
Andrew Waterman	3e44fee398	Don't install private softfloat headers	2 years ago
Andrew Waterman	8feeaf3202	Add include guards to entropy_source.h	2 years ago
Andrew Waterman	238e0ac859	Use "" rather than <> includes in libfdt.h	2 years ago
Andrew Waterman	fb2adef30e	update c++ version to c++2a for CI tests	2 years ago
Andrew Waterman	c96f57e0bb	Fix warning by renaming C++ source to .cc	2 years ago
Andrew Waterman	f205bc4c29	Add missing include	2 years ago
Andrew Waterman	6b89a49838	Merge pull request #1726 from YenHaoChen/pr-dcsr Deprecate dcsr.halt	2 years ago
Binno	4fe12b25db	ssqosid: modify permission check condition for srmcfg The srmcfg csr number is 0x181 which is a S-mode csr The patche uses independant permission check to make the csr available even there is no S-mode	2 years ago
Binno	50c89eaba3	zkr: check extension availability in csr_mseccef permssion check	2 years ago
YenHaoChen	ad86a5fc5c	Deprecate dcsr.halt The debug spec 1.0.0-rc3 deprecates the dcsr.halt and lets the bit become dcsr.nmip. This commit separates the halt variable from the dcsr.nmip and designates it as an internal variable for halt_on_reset (-H). Additionally, this commit removes the notifying comment about the deprecated dcsr.halt in the main loop.	2 years ago
Andrew Waterman	f7d0dba601	Merge pull request #1700 from ved-rivos/ssdbltrp Add Ssdbltrp	2 years ago
Ved Shanbhogue	0797c21001	Add Ssdbltrp	2 years ago
YenHaoChen	707b1f2484	Instantiate vector CSRs only if any_vector_extensions()	2 years ago
YenHaoChen	af90d427af	vector: check extension existence before reading vl	2 years ago
YenHaoChen	67933ec0c3	Check any_vector_extensions() in require_vector_vs	2 years ago
YenHaoChen	cefa747e9a	Check if any vector extensions for vector CSRs	2 years ago
YenHaoChen	eccb557d61	Fix require_vector_vs checking by reverting `66c4853bdc` The require_vector_vs, i.e., sstatus_csr_t::enabled(SSTATUS_VS), was expected to provide has_any_vector() check [1]. Unfortunately, a previous commit [2] made the sstatus_csr_t::enabled(SSTATUS_VS) true without any vector extension. The previous commit [2] was for P-extension, which has been removed from Spike [3]. This commit reverts the commit [2] and corrects require_vector_vs [1]. [1] `a484f6efc5` [2] `66c4853bdc` [3] https://github.com/riscv-software-src/riscv-isa-sim/pull/1660	2 years ago
YenHaoChen	7f8c663886	pointer masking: Implement hstatus.HUPMM (Flush TLB on changing hstatus.HUPMM)	2 years ago
YenHaoChen	69f0c46fe3	refactor: Add specialized hstatus_csr_t	2 years ago
YenHaoChen	c268fb2564	pointer masking: Implement [sh]envcfg.PMM	2 years ago
YenHaoChen	f710dc706b	pointer masking: Implement Smnpm (Flush TLB on changing *envcfg.PMM)	2 years ago
YenHaoChen	faeef6ee14	pointer masking: Let [sh]envcfg.PMM be WARL if with Ssnpm	2 years ago
YenHaoChen	370f741a97	pointer masking: Support _ssnpm to --isa	2 years ago
YenHaoChen	6cc342bcfa	pointer masking: Let menvcfg.PMM be WARL if with Smnpm	2 years ago
YenHaoChen	eea20ae6a2	pointer masking: Support _smnpm to --isa	2 years ago
YenHaoChen	8b5cb0fff2	pointer masking: Let HLVX.* instructions not subject to pointer masking	2 years ago
YenHaoChen	fb761259b3	pointer masking: Let pointer masking not apply when both MPRV and MXR are set	2 years ago
YenHaoChen	a8cc689675	refactor: Add const qualifier to mmu_t::in_mprv()	2 years ago
YenHaoChen	91173cbbc7	pointer masking: Let cache-block management instructions take into account pointer masking	2 years ago
YenHaoChen	42776e6170	pointer masking: Let cache-block zero instruction (cbo.zero) take into account pointer masking	2 years ago
YenHaoChen	5beff7ad19	refactor: Rename parameter addr to original_addr in store_slow_path()	2 years ago
YenHaoChen	68df89718f	pointer masking: performance: Move pointer masking out of store fast path	2 years ago

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3548 Commits (c1c0b8b18ca5e5b459c7e506c14e90c02e60a61b) All Branches Search

3548 Commits (c1c0b8b18ca5e5b459c7e506c14e90c02e60a61b)

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