Andrew Waterman
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ba9e6314de
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changed page size to 8KB
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15 years ago |
Yunsup Lee
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fa079e1858
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Merge branch 'master' of github.com:ucb-bar/riscv-isa-sim
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15 years ago |
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Yunsup Lee
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4f3f70f6b7
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fix vf
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15 years ago |
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Yunsup Lee
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ed8a77d328
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yunsup made this fix..ask him
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15 years ago |
Andrew Waterman
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4ddd7773f8
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don't forget to commit configure after autoconf!
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15 years ago |
Rimas Avizienis
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91edaf151d
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added #include <stdlib.h> to get rid of errors building with gcc-4.4 on ubuntu
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15 years ago |
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Rimas Avizienis
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582b17ecaf
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bugfix to riscv.ac
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15 years ago |
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Rimas Avizienis
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3bec77de69
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fixes to make disassembly work under macos (with macports binutils installed)
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15 years ago |
Andrew Waterman
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ff8e196057
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Builds and runs on Mac OS 10.6.7
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15 years ago |
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Andrew Waterman
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4324288eb8
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post-repo-split cleanup
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15 years ago |
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Andrew Waterman
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77452a26e7
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temporary undoing of renaming
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15 years ago |
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Andrew Waterman
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740f981cfd
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[sim] renamed to riscv-isa-run
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15 years ago |
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Andrew Waterman
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c0ebf99d6b
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[xcc] minor performance tweaks
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15 years ago |
|
Andrew Waterman
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20bc10dc08
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[xcc] fixed simulator build time
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15 years ago |
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Andrew Waterman
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f23ae8b0bc
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[xcc] tlb now stores host addresses
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15 years ago |
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Andrew Waterman
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d6fd350f0c
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[xcc] cleaned up mmu code
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15 years ago |
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Andrew Waterman
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e665e552b3
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[xcc] fix configure scripts
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15 years ago |
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Andrew Waterman
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a23f18a6a6
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[xcc] instructions now set PC explicitly
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15 years ago |
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Andrew Waterman
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3fcb2cbe79
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[sim, opcodes] made sim more decoupled from opcodes
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15 years ago |
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Andrew Waterman
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82403eb338
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[sim] fix writeback after ipi clearing
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15 years ago |
Andrew Waterman
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ca156be905
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[sim] add ability to clear IPIs
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15 years ago |
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Andrew Waterman
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f1bb8270a1
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[sim] fault on failed addr translations
previously, a bad PTE would segfault the simulator, rather than sending
the fault to the OS.
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15 years ago |
|
Andrew Waterman
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2641a9b24f
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[sim] minor sim cleanup
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15 years ago |
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Andrew Waterman
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e8d6925f0e
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[sim,opcodes] improved sim build and run performance
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15 years ago |
|
Andrew Waterman
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605d638068
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[fesvr,xcc,sim] fixed multicore sim for akaros
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15 years ago |
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Andrew Waterman
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c42bce582a
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[sim,xcc] add rdcycle/rdtime/rdinstret
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15 years ago |
|
Andrew Waterman
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bb09521614
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[sim] more fp<->int fixes
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15 years ago |
|
Andrew Waterman
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996c3808ad
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[sim] more fp conversion bugs fixed
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15 years ago |
|
Yunsup Lee
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93f1d11a4f
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[sim] change default hwvl
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15 years ago |
|
Yunsup Lee
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f8ca42bf48
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[sim] vlen calc reflects the hardware
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15 years ago |
|
Andrew Waterman
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6928933df6
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[sim] fixed fcvt rounding bugs
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15 years ago |
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Yunsup Lee
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dd1da16567
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[opcodes,pk,sim] add more vector traps (for #banks, illegal instructions)
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15 years ago |
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Andrew Waterman
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6e85b4332f
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[sim,pk] cleanups & initial virtual memory support
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15 years ago |
|
Yunsup Lee
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7a589027a7
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[sim,xcc] change cond. mov inst format, add implementation
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15 years ago |
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Yunsup Lee
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80b00e616e
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[opcodes,pk,sim,xcc] resolve a conflict
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15 years ago |
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Yunsup Lee
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29d89ec1e6
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[libs,opcodes,pk,sim,xcc] add mov*,fmov*, shuffle vec insts
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15 years ago |
|
Andrew Waterman
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eb601cb532
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[sim] initial support for virtual memory
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15 years ago |
|
Andrew Waterman
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57b8698931
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[sim] stubs for perfctr instructions
|
15 years ago |
|
Andrew Waterman
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25123f03b9
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tweaked encoding of rdcycle & cousins
|
15 years ago |
|
Andrew Waterman
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ef2e75f0bd
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[sim] fixed building sim without cache simulators
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15 years ago |
|
Andrew Waterman
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46f2fb1d9e
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[sim] hacked in a dcache simulator
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15 years ago |
|
Andrew Waterman
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913ee989dd
|
[xcc,sim,opcodes] added c.addiw
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15 years ago |
|
Andrew Waterman
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d5518cd4d9
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[xcc,sim,opcodes] added more RVC instructions
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15 years ago |
|
Andrew Waterman
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c0cd05e70b
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[sim] fixed divw/remw crashing simulator
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15 years ago |
|
Andrew Waterman
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c6b549289a
|
[xcc,sim] rv64 'w' instruction semantics changed
they no longer require their inputs to be canonicalized 32b values, so
this speeds up mixed int/long code sequences.
|
15 years ago |
|
Andrew Waterman
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0433532951
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[xcc,sim,opcodes] added rvc conditional branches
|
15 years ago |
|
Andrew Waterman
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95d58037b2
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[sim] removed undefined behavior for non-canonical inputs
|
15 years ago |
|
Andrew Waterman
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6e2844c1b5
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[sim] added "str" debug command
it prints the c string starting at the specified memory address.
|
15 years ago |
|
Andrew Waterman
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5c96429584
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[sim] fixed jalr immediate bug
|
15 years ago |
|
Andrew Waterman
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481c9e8fd8
|
[sim] added icache simulator (disabled by default)
|
15 years ago |
