riscv-isa-sim

4145 Commits

53 Branches

3 Tags

21 MiB

Tree: adc12d2a3d

Commit Graph

Author	SHA1	Message	Date
Alexander Romanov	0f289394f3	ci: auto-generate per extension snippy tests This way adding new extension tests is as easy as adding 1 line script call and it is much harder to leave some instruction untested	8 months ago
Alexander Romanov	dac31c1799	test: add basic random tests for V extension	10 months ago
Alexander Romanov	c44fd213bd	ci: add testing with llvm-snippy This commits adds basic spike testing using llvm-snippy random code generator. This initial testing runs spike on random valid code snippets and checks that it doesn't fail. Co-authored-by: Ksenia Dobrovolskaya <ksenia.dobrovolskaya@syntacore.com>	10 months ago

Author

SHA1

Message

Date

Alexander Romanov

0f289394f3

ci: auto-generate per extension snippy tests

This way adding new extension tests is as easy as adding 1 line script
call and it is much harder to leave some instruction untested

8 months ago

Alexander Romanov

dac31c1799

test: add basic random tests for V extension

10 months ago

Alexander Romanov

c44fd213bd

ci: add testing with llvm-snippy

This commits adds basic spike testing using llvm-snippy random code
generator. This initial testing runs spike on random valid code snippets and
checks that it doesn't fail.

Co-authored-by: Ksenia Dobrovolskaya <ksenia.dobrovolskaya@syntacore.com>

10 months ago

3 Commits (adc12d2a3d755c821832cd118a5cdb503555c34a)