a1d3b43bca
Report CBO.ZERO faults on effective address, not base address
2 days ago
1494468abe
Report triggers on CBOs using effective address, not block address
2 days ago
b21cccdc5f
Merge pull request #2246 from chihminchao/rvp-rv32-rv64
rvp for rv32/rv64
2 weeks ago
f2aa295a31
rvp: replace __int128 with int128_t/uint128_t and guard p-ext by HAVE_INT128
Replace bare __int128 / unsigned __int128 in psshar_dhs.h and psshar_dws.h
with the int128_t / uint128_t typedefs from fesvr/byteorder.h, and guard
the entire riscv_insn_ext_p list in riscv.mk.in with $(if $(HAVE_INT128),...)
matching the existing pattern for the V extension
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
1 month ago
632777d371
Merge pull request #2199 from nabudahab/master
Add support for per-hart start PCs (--pcs)
3 weeks ago
6e00eaaeee
Merge branch 'master' into master
3 weeks ago
dbb30bb31a
Merge pull request #2282 from v-efimov/master
added is_client_connected method to remote_bitbang class
4 weeks ago
4bf7da7d73
Merge pull request #2281 from demin-han/master
Fix condition for setting critical_error
4 weeks ago
89cb870ed8
added is_client_connected method to remote_bitbang class
4 weeks ago
705b414de8
Fix condition for setting critical_error
4 weeks ago
91a0debd84
rvp: add missing vxsat CSR writes for 70 saturating instructions
Per the P-extension spec, any instruction that performs saturation must
set the vxsat CSR to 1 when the result is clamped. 70 instructions were
missing this write, addressed here in two ways:
1. Convert P_SAT, P_USAT, and P_USAT_FULL macros from pure expression
macros to GCC statement expressions that detect when saturation
occurs and write P.VU.vxsat. This automatically fixes ~42
instructions that use these macros (nclip/nclipi/nclipr/nclipri
families, psati, psslai, pssh1sadd, pusati, sati, usati, ssh1sadd,
sslai, and their packed/double-wide variants).
2. Add explicit vxsat writes to 22 instructions with inline saturation
logic that bypasses the macros:
- mulq/mulqr/pmulq/pmulqr: set vxsat on INT_MIN * INT_MIN overflow
- psas/pssa cross variants: set vxsat from sat_add/sat_sub sat flag
- pssha/psshar DW variants: set vxsat from ov overflow flag
- pssha/psshar/ssha/sshar: set vxsat in sshamt >= BIT overflow path
- pusati_dh/pusati_dw: set vxsat on unsigned range clamping
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
1 month ago
9983d2049f
rvp: add disassembler
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
3 months ago
7a42a63eca
rvp: new instructions from 0.20
The complete set of instructions added for RV32 are:
PSSHL.HS SSHL PSSHL.DHS PSSHL.DWS
PSSHLR.HS SSHLR PSSHLR.DHS PSSHLR.DWS
And for RV64:
PSSHL.HS PSSHL.WS SHL PNCLIPP.B PNCLIPP.H PNCLIPP.W
PSSHLR.HS PSSHLR.WS SHLR PNCLIPUP.B PNCLIPUP.H PNCLIPUP.W
reference:
https://www.jhauser.us/RISCV/ext-P/RVP-instrEncodings-020.pdf
https://www.jhauser.us/RISCV/ext-P/RVP-baseInstrs-Sail-020.txt
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
2 months ago
d4a87e9caa
rvp: add packed instructions for rv64 - part2
Add the following categories
* packed zip and unzip instructions
* packed basic arithmetic and data-move
* packed multiply instructions (_w suffix only)
* packed accumulate instructions (_w suffix
* packed multiply-add instructions (_w/_h suffix
* packed sati/usati/srari for rv64
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
4 months ago
71b7473b5f
rvp: add packed instructions for rv64 - part1
Add the following categories
* RD-only element-wise instructions (_w suffix
* packed add/sub instructions (_w suffix only)
* packed cross instructions (_wx suffix only)
* packed accumulation instructions (_ws suffix
* packed sign-extend and saturating instructions
* packed shift instructions (_w/_ws suffix and
* packed compare instructions (_w suffix only)
* packed pack instructions (_h/_w suffix only)
* rev_rv32/rev/rev16
4 months ago
2e2748b2e0
rvp: add packed instructions for rv32 - part2
Add the following instructions to rv32
* packed add/sub register-pair instructions
* packed cross register-pair instructions
* packed absolute register-pair instructions
* packed accumulation register-pair instructions
* packed sign-extend and saturating
* packed shift register-pair instructions
* packed compare register-pair instructions
* packed pack register-pair instructions
* packed zip register-pair instructions
* packed narrowing shift and clip register-pair
* packed multiply register-pair instructions
* packed accumulate register-pair instructions
* packed multiply-add register-pair instructions
4 months ago
e4ad4513c7
rvp: add packed instructions for rv32 - part1
add the following categories
* packed add/sub/pli instructions
* packed cross instructions
* packed absolute instructions
* packed accumulation instructions
* packed sign-extend and saturating instructions
* packed shift instructions
* packed compare instructions
* packed pack instructions
* packed basic arithmetic and data-move
* packed multiply instructions
* packed accumulate instructions
* packed multiply-add instructions
* RD-only element-wise register-pair
4 months ago
5b910fd88f
rvp: add opcode
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
2 months ago
028a698550
rvp: disasm: add simd and register-pair instruction support
4 months ago
e8369a74a3
Merge branch 'master' into master
1 month ago
770ce31f75
Merge pull request #2275 from nibrunieAtSi5/fixing-invalid-bdot
[#2273 ][bulknormdot] fixing spurious invalid flag in bulk_norm_dot_no_mult
1 month ago
aa9dd6aeda
Merge pull request #2278 from riscv-software-src/reduce-virtual-calls-chunk
refactor: remove excessive chunk_max_size calls
1 month ago
f369386d5a
refactor: remove excessive chunk_max_size calls
These calls are virtual and cause notable overhead
1 month ago
41c31ce427
[ #2273 ][bulknormdot] fixing spurious invalid flag in bulk_norm_dot_no_mult
Bulk normalized dot product is expected to raise the invalid flag if two products with infinite values and opposite signs are added.
Spike function failed to consider the second operand of a product when determining whether the product had infinite value or not, and missed the exclusion of NaN and zero from this case.
The zero case is quiet, because it happens for inf * zero which is expected to raise the invalid flag. The qNaN case is not quiet and can cause the apparition of a spurious invalid flag when none were expected.
1 month ago
1349b73d58
add comment to spike.cc and clean up code in sim.cc
1 month ago
4e20e447a9
Merge branch 'master' into master
1 month ago
434570f5a6
Merge pull request #2266 from riscv-software-src/zama16b
Implement Zama16b extension
1 month ago
f05baff9f4
Remove unused UNUSED
1 month ago
4172e1a2cc
Implement Zama16b extension
1 month ago
5ea492ac8d
Check triggers for store_slow_path with !actually_store
Fixes #2262
1 month ago
79ac5e9368
Correctly check for misalignment on SC/AMO
1 month ago
0d05926e3e
Convert ssamoswap load traps to store traps
The difference can manifest when checking triggers.
1 month ago
2219879651
Use underscore to indicate unused tuple field
1 month ago
a515bc5205
Remove extraneous comment
1 month ago
0ad45926ac
Merge pull request #2265 from bwv846/mop_rr_7
Fix duplicate addition of mop_rr_7
1 month ago
80a1c934d4
Fix duplicate addition of mop_rr_7
1 month ago
8f38d28b43
Merge branch 'master' into master
1 month ago
5eeeb91efa
Merge pull request #2263 from CircuitSutra/fix_dts_compile_api_hang
Fixed dtc_compile API hangs as child process waits to perform "exit()" instead of "_exit()".
1 month ago
276be7383b
updated child process exit to _exit
1 month ago
a6fb7578c9
Merge pull request #2261 from riscv-software-src/fix-bulk-norm
Bulk normalization granularity is based on VLMAX, not vl
1 month ago
108cf836cb
Bulk normalization granularity is based on VLMAX, not vl
1 month ago
170f398cd4
Merge pull request #2251 from hirooih/make-the-executable-path-relative-from-spike
make the executable path relative from spike
2 months ago
509bec19b0
Merge pull request #2253 from 5265325/feat/zvzip
Add Zvzip extension.
2 months ago
848474582d
Add Zvzip extension.
2 months ago
204b88deda
Merge pull request #2255 from binno/rvv_crypto_fix
disasm: Do not imply Zvbb from RVV crypto groups (#146 )
2 months ago
cd58db2ba7
Merge branch 'master' into rvv_crypto_fix
2 months ago
e6b1a9df4e
Merge pull request #2254 from 5265325/feat/svvptc
Add Svvptc extension.
2 months ago
e06eae1039
disasm: Do not imply Zvbb from RVV crypto groups ( #146 )
Remove EXT_ZVBB enablement from Zvkn, Zvknc, Zvkng, Zvks, Zvksc, Zvksg
• Zvkn = Zvkned + Zvknhb + Zvkb + Zvkt
• Zvknc = Zvkn + Zvbc
• Zvkng = Zvkn + Zvkg
• Zvks = Zvksed + Zvksh + Zvkb + Zvkt
• Zvksc = Zvks + Zvbc
• Zvksg = Zvks + Zvkg
2 months ago
38f162ccd0
Add Svvptc extension.
2 months ago
b386d87922
make the executable path relative from spike
If the relative path cannot be found, use the current PREFIX.
Signed-off-by: Hiroo HAYASHI <24754036+hirooih@users.noreply.github.com>
2 months ago
Andrew Waterman
Chih-Min Chao
Natheir Abu-Dahab
Vladimir Efimov
demin.han
Jason
Alexander Romanov
Nicolas Brunie
nabudahab
Hasmet Akgun
cst-saswatm
Zhibo Hong
Binno Shen
Michelle Wu
Hiroo HAYASHI