Tree: 8aacc4effd

arrv-sc-arrv-sc/snippy-tests

confprec

cs250

cycleh

debug_rom

debug_rom_fence

device_flags

dtm_reset_error

dts_parsing

dynamic

eos18-bringup

factor-out-macros

fetch

fix-2296

fix-bf16

force-rtti

fp-encoding

heterogeneous_mc

hwachav4

increase-stack-size

itrigger-etrigger-cleanup

load_reservation_set_size

log-commits-faster

master

mmio-hack

mvp

no_progbuf

no_progbuf2

nolibfdt

optimized-chunk-size

p-ext-0.5.2

plctlab-plct-zce-fix2

plic-clint-endian

plic_uart_v1

priv-1.10

private-l1-caches

pte-info-and-delegation

remove-tests

rivosinc-etrigger_fix_exception_match

rva-profile-support

sanitize

simplify-misaligned

sodor

sparse-mem

speed2

speedup-hacks

static-link

test

tmp

trigger_priority

tweak_debug_rom

whole-archive

zvmm

dummy-tag-for-ci-storage

v1.0.0

v1.1.0

Branches Tags

${ item.name }

Create tag ${ searchTerm }

Create branch ${ searchTerm }

from '8aacc4effd'

${ noResults }

Commit Graph

2884 Commits (8aacc4effde92122a25beadac594162187767d7e)

 

All Branches   

Search

Author	SHA1	Message	Date
Weiwei Li	8aacc4effd	Add support for new instructions of Zvfbfmin extension	3 years ago
Weiwei Li	40dce7899b	Add support for new instructions of Zfbfmin extension	3 years ago
Weiwei Li	c12d078217	Update encoding.h to add instructions for BF16 extensions	3 years ago
Weiwei Li	fecdad2b62	Add isa string support for Zfbfmin/Zvfbfmin/Zvfbfwma	3 years ago
Weiwei Li	afe3987685	Add convertion function between binary float16 and float32 in softfloat	3 years ago
Jerry Zhao	740e6353a1	Merge pull request #1368 from glg-rv/have_int128/0/topic Minor fixes (mostly related to __int128 support)	3 years ago
Andrew Waterman	c7cc62952d	Merge pull request #1367 from glg-rv/move_isaligned/0/topic decode_macros: move 'is_aligned' from 'v_ext_macros.h'	3 years ago
Gianluca Guida	c231e0c9f6	Fix check for extension Calling 'extension_enabled' this early during the constructor of 'processor_t' causes SIGSEGV.	3 years ago
Gianluca Guida	3010cb4175	Use HAVE_INT128 instead of __SIZEOF_INT128__ Make sure that the configure decision on 128-bit is consistent during compilation. Also move uint128_t definition.	3 years ago
Gianluca Guida	b3a3063b57	configure.h: Add HAVE_INT128 Modify configure.ac to generate a header that expose the support for 128-bit integers.	3 years ago
Gianluca Guida	4d3847f0ff	decode_macros: move 'is_aligned' from 'v_ext_macros.h'	3 years ago
Andrew Waterman	1bcbd715dc	Merge pull request #1366 from riscv-software-src/fix-1365 Implement dcsr.v and make DRET use it	3 years ago
Andrew Waterman	2c6b94e853	Refactor set_privilege to subsume set_virt This cleans up the code and avoids bugs like #1365.	3 years ago
Scott Johnson	0abf98f6f6	Move setting of V=0 for M-mode trap So it's right next to set_privilege() which it will be combined with next.	3 years ago
Scott Johnson	87bf990083	Move setting of V=0 for HS-mode trap So it's right next to set_privilege() which it will be combined with next.	3 years ago
Scott Johnson	505ddebeff	Explicitly use the nonvirtual S-mode CSRs when going to HS-mode Since we're going to move the change to state->v next.	3 years ago
Scott Johnson	5ab7691a49	Force V=1 when going to VS-mode trap handler Should already be 1.	3 years ago
Scott Johnson	4e509bfbc6	Redo sret to put set_virt/set_privilege together	3 years ago
Andrew Waterman	e7f677b57f	Prevent possibility of V=1 and PRV=M when entering debug mode	3 years ago
Andrew Waterman	d99efb545c	Implement dcsr.v and make DRET use it Resolves #1365	3 years ago
Andrew Waterman	e910707051	Use more descriptive variable name in dcsr_csr_t::read; make it reg_t	3 years ago
Andrew Waterman	fa79c20a4e	Merge pull request #1350 from rivosinc/etrigger_fix_exception_match triggers: Fix etrigger match on exceptions	3 years ago
Atul Khare	d9e30bb697	triggers: Fix etrigger match on exceptions The etrigger match on exceptions doesn't work properly in cases like the following: 1) M-mode delegates ECALLs to S-mode 2) A CPU hardware point mechanism is used to place a breakpoint on the Umode instruction that executes the ECALL from Umode to Smode. In effect, this creates a breakpoint etrigger based on Umode. In the above, the expectation is that #2 will first cause an exit to the Smode handler (stvec), and the hardware breakpoint exception will be triggered following an entry into the handler. However, since etrigger currently checks the current privilege mode, we will never get a match on conditions like #2. The patch attempts to address the issue by using the stashed version of the previous privilege mode for the etrigger match. cc: YenHaoChen <howard25336284@gmail.com> Signed-off-by: Atul Khare <atulkhare@rivosinc.com>	3 years ago
Atul Khare	31f5ede662	Enhance mode_match() functionality The current version of mode_match() is based on the current privilege level. This adds an explicit privilege and virtual mode parameters in anticipation of an upcoming patch for matching trap triggers.	3 years ago
Atul Khare	ddae0f25a8	Add prev_prv to processor state This adds the prev_prv field to track the previous privilege. It will be used in a forthcoming patch for trigger matching.	3 years ago
Atul Khare	fb57d7ce04	Add pre_v to processor state This adds the prev_v field to track the previous virtual mode state. We also assign it unconditionally to handle cases for trigger matching like the following (pointed out by Scott Johnson): 1) SRET from HS to VU: prev_v is set to 0 2) Trap from VU to VS: state.v/prev_v won't be assigned because of unchanged v, and remain 0. 3) An etrigger that's set to break on a VU-mode trap won't match properly because prev_v is incorrect This be used in a forthcoming patch for trigger matching.	3 years ago
Andrew Waterman	23bc4cd63a	Merge pull request #1363 from YenHaoChen/pr-initial-mpp Let mstatus.MPP initially be M-mode if unsupporting U-mode	3 years ago
YenHaoChen	4dfdf00f13	Let mstatus.MPP initially be M-mode if unsupporting U-mode This commit lets the mstatus.MPP be a valid value if unsupporting U-mode. Without this commit, the mret may result in a corrupted state without properly setting the MPP to M-mode (if unsupporting U-mode).	3 years ago
Andrew Waterman	8780656d5a	Merge pull request #1346 from Wojciech-Bartczak/spike-as-lib Install meta pkg-config file for Spike.	3 years ago
Wojciech Bartczak	7dbd0949c9	Add Spike's meta files for pkg-config This commit adds the *.pc files for Spike's simulation library, enabling dynamic and static linking without the need to directly reference Spike sources. Using Spike as a stand-alone library provides an interesting option for developing tools and applications based on Spike.	3 years ago
Andrew Waterman	76b0027c17	Merge pull request #1347 from rbuchner-aril/rb-872 Fix for #872 mstatus.GVA	3 years ago
rbuchner	a30a0d6367	Use passed in virtual bit for creating traps in take_trigger_action() rahter than state.v Fixes case 1 from https://github.com/riscv-software-src/riscv-isa-sim/issues/872	3 years ago
rbuchner	33fbc2df39	Plumb in effective virtual bit to take_trigger_action()	3 years ago
rbuchner	36b8c12e9f	Add split_misaligned_access() to mem_access_info_t	3 years ago
rbuchner	4b9996bad9	Pass mem_access_info_t into walk()	3 years ago
Ryan Buchner	f7900e4730	Use access_info within store_slow_path rather than xlate_flags	3 years ago
rbuchner	850600792e	Use access_info.effective_virt when failed mmio_store (i.e. device detects access fault) Fixes case 3 from https://github.com/riscv-software-src/riscv-isa-sim/issues/872	3 years ago
Ryan Buchner	125c4d6a64	Adjust store_slow_path_intrapage to recieve a mem_access_info_t as input	3 years ago
Ryan Buchner	2745d3139c	Use access_info within load_slow_path rather than xlate_flags Fixes case 2 from https://github.com/riscv-software-src/riscv-isa-sim/issues/872	3 years ago
rbuchner	bd67576609	Use access_info.effective_virt when failed mmio_load (i.e. device detects access fault) Fixes case 3 from https://github.com/riscv-software-src/riscv-isa-sim/issues/872	3 years ago
rbuchner	9312137ae2	Use access_info.effective_virt when access_fault due to non-reservable lr Fixes case 4 from https://github.com/riscv-software-src/riscv-isa-sim/issues/872	3 years ago
Ryan Buchner	87690a5ed4	Adjust load_slow_path_intrapage to recieve a mem_access_info_t as input	3 years ago
Ryan Buchner	8a34e1a5b3	Add structure (mem_access_info_t) for holding memory access information Add complementary function for generating access information. Update mmu_t::translate() to accept a mem_access_info_t.	3 years ago
rbuchner	a0c5bf31ba	Add is_special_access() to xlate_flags_t	3 years ago
rbuchner	d091f84af4	Add xlate_flags_t struct Use xlate_flags_t rather than XLATE_FLAGS preprocessing directives	3 years ago
Ryan Buchner	3286d262eb	Rename RISCV_XLATE_VIRT to RISCV_XLATE_FORCED_VIRT More readable/understandable.	3 years ago
Andrew Waterman	dc3eb2d9e3	Merge pull request #1357 from ptomsich/ptomsich/1312-fix-fcvtmod_w_d-exceptions Zfa: fix exception behaviour for fcvtmod.w.d	3 years ago
Andrew Waterman	c10ed407ca	Merge pull request #1356 from ptomsich/ptomsich/1355-fix-fleq-fltq-exceptions Zfa: fix missing set_fp_exceptions for fleq/fltq	3 years ago
Andrew Waterman	64532f9678	Merge pull request #1354 from ptomsich/ptomsich/1327-fix-fli_q-entries Fix implementation of FLI.Q instruction	3 years ago
Philipp Tomsich	b07f893609	Zfa: fix missing set_fp_exceptions for fleq/fltq	3 years ago