Tree: 7a42a63eca

arrv-sc-arrv-sc/snippy-tests

confprec

cs250

cycleh

debug_rom

debug_rom_fence

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dtm_reset_error

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dynamic

eos18-bringup

factor-out-macros

fetch

fix-2296

fix-bf16

force-rtti

fp-encoding

heterogeneous_mc

hwachav4

increase-stack-size

itrigger-etrigger-cleanup

load_reservation_set_size

log-commits-faster

master

mmio-hack

mvp

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no_progbuf2

nolibfdt

optimized-chunk-size

p-ext-0.5.2

plctlab-plct-zce-fix2

plic-clint-endian

plic_uart_v1

priv-1.10

private-l1-caches

pte-info-and-delegation

remove-tests

rivosinc-etrigger_fix_exception_match

rva-profile-support

sanitize

simplify-misaligned

sodor

sparse-mem

speed2

speedup-hacks

static-link

test

tmp

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tweak_debug_rom

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Commit Graph

4044 Commits (7a42a63eca22d808f14444e538be755e8fb2e78d)

 

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Author	SHA1	Message	Date
Andrew Waterman	2794373c62	Merge pull request #2042 from riscv-software-src/register-device Don't include built-in devices in mmio_device_map	10 months ago
Andrew Waterman	8da8b6a34d	Don't include built-in devices in mmio_device_map Only use mmio_device_map for plugin devices. This fixes a collision caused by multiple static initializers if Spike depends on a library that depends on libriscv.so.	10 months ago
Andrew Waterman	c61e4bccce	Remove brittle reliance on ordering of factory table	10 months ago
Andrew Waterman	483e01d486	Merge pull request #2037 from riscv-software-src/2036-redux Only support 56-bit PMP and ATP addresses	10 months ago
Andrew Waterman	352597c4cf	Remove MAX_PADDR_BITS It isn't used anymore.	10 months ago
Andrew Waterman	a89875689e	Only support 56-bit PMP addresses As mandated by the ISA spec.	10 months ago
Andrew Waterman	72e8cad123	Implement processor_t::paddr_bits correctly It wasn't being called anywhere, so the 50- vs. 56-bit discrepancy never manifested.	10 months ago
Andrew Waterman	94beb3c026	Remove physical address checks in sim_t Processors are responsible for validating physical addresses; the bus is only responsible for making some device lives at a given address.	10 months ago
Andrew Waterman	3e58f5ef62	Merge pull request #2033 from i2h2/vs-interrupts AIA: vstopi should only be used for AIA-extended interrupts	10 months ago
Ian Huang	b6f4d246bc	AIA: vstopi should only be used for AIA-extended interrupts VSEIP/VSTIP/VSSIP should come in through the non-SSAIA path. vstopi will be used to throw VTI and IID > 13 interrupts.	11 months ago
Andrew Waterman	2a0bb5f543	Merge pull request #2029 from theOfficeCat/README.md-zfa Add Zfa to README.md	10 months ago
Aike Gilabert Gámez	b9e1d219c8	Add Zfa to README.md Signed-off-by: Aike Gilabert Gámez <aikegilabert@gmail.com>	10 months ago
Andrew Waterman	965547260a	Merge pull request #2025 from mslijepc/mslijepc_20250702_additional-files-riscvmkin added jtag_dtm and remote_bitbang to riscv_install_hdrs	11 months ago
Andrew Waterman	4c932cff7a	Merge pull request #1882 from fk-sc/fk-sc/mprven-support Add DCSR.MPRVEN support	11 months ago
mslijepc	d2cf8b0419	added jtag_dtm and remote_bitbang to riscv_install_hdrs	11 months ago
Farid Khaydari	9b2a1d6c81	Add DCSR.MPRVEN support Adds DCSR.MPRVEN bit support, as specified in RISC-V External Debug Support Version 1.0.0-rc4 (https://github.com/riscv/riscv-debug-spec/releases/tag/1.0.0-rc4, see 4.9.1 Debug Control and Status). This bit allows to enable hardware virtual address translation when memory access is initiated by the debugger (see 4.1 Debug Mode, clause 2). This change: * Increases debug specification coverage, allows more detailed testing of external debuggers with Spike. * Decreases the number of required abstract commands to read virtual memory thus improving the user experience. Commit's changes: * Added MPRVEN field to DCSR register * Updated debug_rom.S to turn off MPRVEN on memory access To avoid unwanted address translation while debug_rom.S executed DCSR.MPRVEN bit has to be cleared before and restored after access. Signed-off-by: Farid Khaydari <f.khaydari@syntacore.com>	1 year ago
Andrew Waterman	ba54a6015f	Merge pull request #2022 from aap-sc/aap-sc/another_unused_variable_warning remove unused EGS constant from vsm4r_vs handler	11 months ago
Parshintsev Anatoly	7f8aa45514	remove unused EGS constant from vsm4r_vs handler The macro require_vsm4_constraints defines EGS once again (shadowing the definition of this constant, since it introduces a new scope). This renders the original definition as "unused", causing warning during compilation.	11 months ago
Andrew Waterman	14670706c1	Merge pull request #2021 from aap-sc/aap-sc/unused_write_warning_fixup fixed warnings about unused parameter when csrs.h file is included	11 months ago
Parshintsev Anatoly	380efd9b80	fixed warnings about unused parameter when csrs.h file is included	11 months ago
Andrew Waterman	70687ccf41	Merge pull request #2015 from binno/fix_mseccfg_write Continue mseccfg write operation even without PMP setting	11 months ago
Andrew Waterman	79907ef8d3	Merge pull request #2014 from binno/fix_vs_exception_delegation Adjust vsdeleg from VSSIP to SSIP interrupt occurred	11 months ago
Andrew Waterman	0f8875631a	Merge pull request #2013 from binno/aia_fix Ensure AIA extension enabled when accessing hvictl	11 months ago
Binno	5d0ab7e1f0	Check H extension enabled when accessing hvictl Signed-off-by: Binno <binno.shen@sifive.com>	11 months ago
Binno	c17d206089	Continue mseccfg write operation even without PMP setting Signed-off-by: Binno <binno.shen@sifive.com>	1 year ago
Binno	46fdf37d65	Adjust vsdeleg from VSSIP to SSIP interrupt occurred Signed-off-by: Binno <binno.shen@sifive.com>	11 months ago
Binno	7c01135f5b	Ensure AIA extension enabled when accessing hvictl Signed-off-by: Binno <binno.shen@sifive.com>	12 months ago
Andrew Waterman	065950a045	Merge pull request #2010 from jmonesti/perf.aia Performance: processor_t::take_interrupt() should check EXT_SSAIA	11 months ago
Jean-François Monestier	4dfba258d9	Performance: processor_t::take_interrupt() should check EXT_SSAIA The implementation of SMAIA and SSAIA extensions incurs a significant performance penalty. Better check whether EXT_SSAIA is enabled before accessing the considered CSR's Cf. commit # ddc025a80d commit # a6708d5588	11 months ago
Andrew Waterman	5cb0a97677	Merge pull request #2008 from HaochenGui/all-one-agnostic Bypass masked-off elements for viota	11 months ago
Haochen Gui	1ec477fffe	Bypass masked-off elements for viota * riscv/insns/viota_m.h: Bypass masked-off elements.	11 months ago
Andrew Waterman	4f1d8abf39	Merge pull request #2005 from riscv-software-src/ziccid Implement Ziccid extension	11 months ago
Andrew Waterman	833ab91894	Reduce perf impact of Ziccid Modifications are expected to be uncommon, so don't flush the I$ quite so often.	11 months ago
Andrew Waterman	cce834e437	Support Ziccid extension	11 months ago
Andrew Waterman	b6a061b683	Support Ziccif extension	11 months ago
Andrew Waterman	99194302df	Merge pull request #2004 from jmonesti/bugfix-cm.jalt Bugfix cm.jalt	11 months ago
Jean-François Monestier	2554792041	Bugfix cm.jalt	11 months ago
Andrew Waterman	5894afaaa5	Merge pull request #2001 from Steven-Li-Xiaogang/master menvcfg.CDE is defined by Smcdeleg not Smcsrind	11 months ago
steven	937e812212	menvcfg.CDE is defined by Smcdeleg	11 months ago
Andrew Waterman	4c870d063d	Merge pull request #1998 from mingtians/update-readme Update README with Zimop extension	12 months ago
mingtians	05f2a66564	Update README with Zimop extension	12 months ago
Andrew Waterman	d28344a1e7	Merge pull request #1988 from binno/pr-aia AIA: Implement Smaia/Ssaia extension	12 months ago
Andrew Waterman	a3dbcbadf3	Merge pull request #1997 from riscv-software-src/fix-1996 Partially revert #1987 to fix regrssion in vsra.vi and vssra.vi	12 months ago
Andrew Waterman	37db712878	Partially revert #1987 to fix regrssion in vsra.vi and vssra.vi Use arithmetic shifts, not logical shifts. I broke them while fixing #1915.	1 year ago
Andrew Waterman	c8b8821eac	Fix unused variable warnings	12 months ago
Andrew Waterman	a07c190ed6	Merge pull request #1995 from arrv-sc/arrv-sc/fix-store-segfault fix: log store only if it actually happened	12 months ago
Alexander Romanov	7d43d38e4a	fix: log store only if it actually happened Since 92e4f02 moved logging logic into store_slow_path function it has been logging stores even if actually_store parameter is false. Because of that logging is broken for all atomic instructions. Function "amo" calls store_slow_path with nullptr argument and actually_store equal to false while callee uses reg_from_bytes independently from actually_store value All of that causes dereferencing of nullptr. This commit logs memory access only if it actually happened	1 year ago
Andrew Waterman	14cad996bf	Merge pull request #1993 from arrv-sc/arrv-sc/init-blocksz feat: move cache block size initialization to constructor	1 year ago
Mladen Slijepcevic	f6b16b1b3c	Merge pull request #1990 from mslijepc/mslijepc_20250514_external-sim-ptr changing type of external_simulator member of external_sim_device_t	1 year ago
mslijepc	5bf00a87f9	minor spacing fix	1 year ago