9 Commits (79718ed8797147da2219d2f72235f738ded33871)

Author SHA1 Message Date
Jerry Zhao cf5d11c987 Unify fesvr/debug_defines.h and riscv/debug_defines.h 3 years ago
Jerry Zhao 4d4159e76d Pull memif_endianness_t into cfg.h 3 years ago
Andrew Waterman e52327deee Fix build of dtm.cc on RISC-V targets 4 years ago
Schuyler Eldridge b3855682c2 Add missing stdexcept imports 6 years ago
Chih-Min Chao b6f7b65b65 op: update CSR 6 years ago
Andrew Waterman acd953afd2 When enabling the debug module, poll til it's really enabled 6 years ago
Megan Wachs b8eb9cd50d FESVR: ensure dmactive is 1 before reading debug module registers 6 years ago
Megan Wachs 6b90a455dc FESVR: Can't read a DM register when DMACTIVE=0 6 years ago
Andrew Waterman f49618ca9d Add fesvr; only globally install fesvr headers/libs 7 years ago