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riscv-isa-sim
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5 Commits (72a5c14248648c5e953e32529aa1b5b71246d238)

Author SHA1 Message Date
Andrew Waterman 7dfd3525c8 Enable SOFTFLOAT_ROUND_ODD for vfncvt.rod.f.f.w
7 years ago
Marcus Comstedt f437e6a4e9 Implement support for big-endian hosts
7 years ago
Andrew Waterman 89ba757daf Mark SoftFloat routines static inline
11 years ago
Andrew Waterman a95b44df9d Upgrade to latest SoftFloat
11 years ago
Andrew Waterman 017f62ac55 Merge softfloat_riscv into softfloat
13 years ago
Andrew Waterman 77452a26e7 temporary undoing of renaming
15 years ago
Andrew Waterman 740f981cfd [sim] renamed to riscv-isa-run
15 years ago
Andrew Waterman 50ec828baf [sim] integrated SoftFloat-3 with ISA sim; removed SoftFloat-2b
16 years ago
Andrew Waterman 932ec48ad5 [sim] added SoftFloat-3 source
16 years ago