Commit 191634d285 changed the default kernel boot args from
"console=hvc0 earlycon=sbi" to "console=ttyS0 earlycon", but didn't
updated the spike usage help() function.
This commit introduces a new macro DEFAULT_KERNEL_BOOTARGS in order to
have a single definition. This macro is used everywhere in dts.cc and
spike.cc help() function.
Signed-off-by: Julien Olivain <ju.o@free.fr>
The addition of Svadu support and removal of --mmu-dirty
command line flag results in the dirty_enabled configuration state
no longer being used. Remove the remnants of this state.
This commit simplifies the codebase by factoring out memory merging and
intersection checking routines into separate functions. This allows us
to check for corner cases more easily.
16 B suffices to subsume all aligned accesses (including the Q extension).
Spike does not actually rely on this property, but in some real systems,
it is impractical to guarantee atomicity across cache lines.
4096 B suffices to prevent cache lines from spanning pages (which would
require multiple TLB accesses). This one is a bug fix, since we were
not performing multiple TLB accesses in this case.
The only slightly difficult thing here is that hartids will always
be considered "overridden" by the time we get to sim_t::sim_t (either
overridden by a command line argument, or overridden when we set
default hartids just before the constructor). To allow downstream code
to distinguish between "I picked IDs 0, 1, 2, 3 because the user asked
for 4 processors" and "The user explicitly asked for IDs 0, 1, 2, 3",
we have an extra explicit_hartids field.
We now parse to a std::vector<int> and then set the "hartids" variable
to the result.
There is a slight functional change here, in that if you pass
"--hartids 1,2,3 --hartids 4,5", you'll now get 2 cores with ids of
4,5 rather than 5 cores with ids of 1,2,3,4,5. This is what most tools
do with repeated command line arguments and I suspect the old
behaviour was actually by accident!
The motivation here is mostly to enable a refactoring where the memory
layout (sans allocated memory) gets passed to DTS/DTB code before we
ever allocate anything.
But it turns out to make merge_overlapping_memory_regions a bit
simpler, which is an added bonus.
This commit defines a "cfg_t" structure, which currently just holds
the initrd address range. It will be augmented in future commits to
hold other configuration arguments as well.
To represent a configuration argument, we define an arg_t base class.
This holds a current value, together with a flag that tells us whether
the value has been updated from the default. The idea is that in
future we're going to use that flag when reading a DTB file: if an
argument has actually been specified on the command line, we need to
take it into account; if not, we can ignore the default and use the
DTB file's supplied value.
This is a minor change, turning processor_t from a child class of
isa_parser_t into a class that contains an isa_parser_t as a field.
The point is that it is a step toward separating out
"configuration" (and ISA string parsing) from processor state. This
should be helpful for rejigging things so that we construct more from
a supplied device tree.
Julien Olivain
Andrew Waterman
Aaron Durbin
Jerry Zhao
Parshintsev Anatoly
Tim Newsome
Jerin Joy
Weiwei Li
Rupert Swarbrick
Rupert Swarbrick