af399342a4
Fix build nondeterminism by deleting archives before recreating
Otherwise, `ar rcs` will add to the previous archive, creating the
possibility of multiple functions with the same name in the archive.
The linker might not choose the most recent version, resulting in
undefined behavior.
3 years ago
d6e5a0ed89
Speed up histogramming by changing data structure
Since we no longer rely on the map's order, use unordered_map.
3 years ago
ea70167d28
Sort histogram printout count, rather than address
3 years ago
b5f68dc55c
Remove --enable-histogram option
It's now redundant.
3 years ago
7831b3e5f2
Only clear logging structures if logging is enabled
This speeds up histogramming when logging is disabled, with almost
no slowdown for the logging case.
3 years ago
242f23064e
Always use slow path for histogramming
Speeds up fast path after unconditionally enabling histogram.
3 years ago
c379868bd9
Support histogram regardless of configure flag
3 years ago
edcf2d59b7
Merge pull request #1190 from riscv-software-src/reduce-compile-time
Reduce compile time increase introduced by #1189
3 years ago
9152a02ac1
Reduce compile time increase introduced by #1189
Generate one object file per instruction rather than two, which
reduces the overhead of invoking the compiler so many times.
This also reduces the size of the (unstripped) binary substantially.
3 years ago
9f3372a8e3
triggers: add mcontrol6 trigger
3 years ago
730152610a
triggers: refactor: add mcontrol_common_t::legalize_match() function
3 years ago
efc5420c6d
triggers: refactor: remove redundant namespace qualifiers
3 years ago
c0fddfd661
triggers: refactor: extract mcontrol_common_t from mcontrol_t
3 years ago
72daa815a2
triggers: refactor: update trigger_t::mode_match()
3 years ago
015fc185a4
triggers: refactor: add trigger_t::mode_match() function
3 years ago
dc13989f19
Support more than 65 Z* extensions
The isa_extension_t enum already has 44 extensions. In not too long,
the enum will grow in size to 65, when it will collide with the 'A'
extension. Fix that preemptively by starting after 'Z'.
This approach will run out of steam at 165 extensions because we are
using `unsigned char` to represent extensions, but opefully we will have
retired by that point.
In seriousness, we will probably need to refactor the extension_enabled
logic at some point in the future (e.g. when the configuration structure
is finally added) and at that point we should lift the `char` limit.
4 years ago
1f2f68962c
triggers: refactor: move m/s/u/vs/vu to trigger_t
3 years ago
ae016f835c
triggers: refactor: add mcontrol.vs and mcontrol.vu
3 years ago
5f85e8fac0
triggers: refactor: cleaner vs and vu checking
3 years ago
3cb3d10f05
Merge pull request #1189 from riscv-software-src/always_commitlog
Always support commit-logging without performance penalty
3 years ago
919c9a1e3c
Always build with commit logging support
3 years ago
e33913c886
Add logged instruction variants to insn_desc_t
3 years ago
2493734383
Add logged variants of insn templates
3 years ago
2a4cdffc4f
Replace compile-time commitlog check with runtime check for vector writes
3 years ago
20634d0573
Replace compile-time conditional with run-time conditional for load/store logging
3 years ago
83d0a87bb4
Split execute_insn into fast and logged variants
Fast variant should only be used when logging is disabled
3 years ago
10dedb311b
Force slow-path when commit-logging is enabled
3 years ago
6c8fb97f44
Always compile commit-log utility functions
3 years ago
0f85dacdb5
Check commitlog-enable dynamicallly for csr_t::log_special_write
This incurs a negligible performance impact
3 years ago
f8592e43eb
Always reset commit logging variables
3 years ago
9789b250f0
Always perform symbol lookup in debug
3 years ago
43847f5ae0
Fix compile error in commit-logging code
3 years ago
4918a50cd4
Merge pull request #1187 from riscv-software-src/sensibleclint
Allow reads/writes to reserved CLINT regions
3 years ago
1b06630727
Allow reads/writes to reserved CLINT regions
Previously, all loads/stores to reserved regions caused access faults.
Now, loads to reserved regions return 0, while writes are dropped.
This more closely matches actual hardware implementations
3 years ago
203bc302b0
Merge pull request #1186 from ssayin/master
arith.h: remove redundant y1 = t; in mulhu(uint64_t, uint64_t)
3 years ago
72ee60bed3
arith.h: remove redundant y1 = t; in mulhu(uint64_t, uint64_t)
local y1 is set to local t
y1 is never accessed in the lines that follow
3 years ago
788b295932
Merge pull request #1184 from riscv-software-src/libriscv
Support using sim.h/processor.h as public interfaces
3 years ago
46e6be48e9
Add github actions test that installed headers are usable
3 years ago
67219b20a3
Remove processor.h/sim.h -> config.h dependencies
3 years ago
33317e59e5
Add missing vector_unit.h to install headers list
3 years ago
fbbf0b8c94
Remove entropy_source.h -> internals.h dependency
3 years ago
20fe79974c
Add missing abstract_interrupt_controller.h to header lists
3 years ago
80cc9d1929
Remove debug_module.h -> mmu.h dependency
3 years ago
fa4079bcba
Use relative include paths to support public usage of these headers
3 years ago
8c1b434d63
Don't install instruction decode macros
3 years ago
e1919d3b06
Add config.h includes directly to source files instead of relying on header chaining
This step is to ensure that removing config.h out of headers will not cause regressions.
3 years ago
3b9a3f17ba
Merge pull request #1183 from riscv-software-src/macosci
Add github actions test on macos
3 years ago
3fb390bf56
Add github actions test on macos
3 years ago
0adec00bd2
Merge pull request #1182 from riscv-software-src/fix-1180
Fix build broken by #1170 and #1180
3 years ago
16be7c743f
Merge pull request #1181 from riscv-software-src/better-error-message
Print better error message when requesting >1024 harts
3 years ago
Andrew Waterman
YenHaoChen
Jerry Zhao
Serdar Sayın