46a6786091
Make progbuf a run-time option.
Also add an implicit ebreak after the program buffer. This is not part
of the spec, but hopefully it will be.
9 years ago
12714e371e
Rename badaddr to tval
9 years ago
a06091861c
Rename sptbr to satp
9 years ago
160c1a5cee
Set tval to 0 on traps with no specified tval
Simply not writing the register was not a conformant implementation.
9 years ago
d7ceeabbe6
Implement priv-1.11 interrupt-priority scheme ( #161 )
Closes #159 .
a62e76cb16
9 years ago
86426a3336
Fix commitlog. ( #162 )
A regression caused any instruction with rd=x0 to not be emitted.
9 years ago
f8a83a8052
Merge pull request #156 from p12nGH/noncontiguous_harts
Support for non-contiguous hartids
9 years ago
6c7c772b16
hartids knob description added
9 years ago
85efaaaba8
Support for non-contiguous hartids
9 years ago
f5bdc2e342
Remove redundant U/S mode advertisement
9 years ago
f87cdfec1d
H-mode no longer exists
It's supplanted by the hypervisor extension, which doesn't use the privilege
encoding of 2; it still looks like supervisor (i.e. 1).
9 years ago
e0e462ddd4
MPP is now WARL
9 years ago
8feec3d0a5
Implement Q extension for disassembler ( #153 )
9 years ago
4c286ec230
Fix disassembly of c.li 0
Resolves #152
9 years ago
5953e86116
Merge pull request #151 from riscv/htif_dts
Put HTIF in the device tree
9 years ago
092b464c06
Put HTIF in the device tree
I wanted to actually put the address of the HTIF into the DTS, but that
seems to be a bit too much work: since the HTIF addresses are just
defined in an ELF file it's a bit awkward to make that work.
Instead, I'm just putting a dummy HTIF key in the DTS.
9 years ago
95fafa8f05
Mask medeleg correctly
9 years ago
8b389440b7
Don't permit delegation of interrupts that M-mode should handle
9 years ago
3b1e9ab752
Fix commit-log for Q extension, and for RV32 ( #143 )
* Fix commit-log for Q extension, and for RV32
The number of nibbles printed out now depends upon XLEN or FLEN,
as appropriate.
* Factor out FLEN calculation
9 years ago
38438778f0
Fix bus_t bug with devices at 0x0
Fix a bug that prevented bus_t from storing to, loading from,
or finding a device that existed at address 0x0.
Resolves : #135
9 years ago
27ffc270f4
Fix implementation of FMIN/FMAX NaN case
If rd=rs1 or rd=rs2, the NaN check examined the wrong value.
9 years ago
a91d9f7d89
Include math.h for NAN ( #137 )
commit 85c40db208
9 years ago
3177a7c5a6
Merge pull request #129 from riscv/q-extension
Implement Q extension
9 years ago
85c40db208
Implement Q extension
9 years ago
58b6c187df
Merge pull request #128 from riscv/reset
Fix debug reset.
9 years ago
bd85811c35
Update SoftFloat
9 years ago
def8b3e05d
Actually let hartreset be set.
9 years ago
526d3997e6
Fix debug reset.
ndmreset now resets all harts (instead of just the current hart), and
hartreset resets the selected hart (instead of being ignored).
9 years ago
b86f2a51f5
Fix corner case in repeated execution ( #127 )
Specifically, don't print out the execution count if the same
instruction is executed by different harts.
9 years ago
c471f5d84e
Fix comment typo. ( #126 )
9 years ago
8969a85513
Merge pull request #123 from riscv/debug_interrupts
Don't take interrupts while in Debug Mode.
9 years ago
fb1f3f7ca9
Don't take interrupts while in Debug Mode.
9 years ago
111dce1919
Merge pull request #121 from riscv/debug_store
Add a nice debug printf for debug_module_t::store
9 years ago
b5bbd05923
Add a nice debug printf for debug_module_t::store
9 years ago
3151df24e5
Merge pull request #119 from riscv/quiet
Turn off debug module debug printfs.
9 years ago
2e47be027c
Turn off debug module debug printfs.
Nobody wants to see all that, and if they do they should recompile.
9 years ago
7f746b7c2f
Correct c.li and c.lui disassembly ( #118 )
I currently get this disassembly
00004881 jr a7
but if I understand that's incorrect and I want
00004881 li a7, 0
If I'm reading the ISA manual correctly, the disassembler was just wrong
here.
9 years ago
96218b1cdc
Merge pull request #117 from riscv/multicore_debug
Fix multicore debug.
9 years ago
4f8b6a6948
Fix multicore debug.
In an older implementation I was thinking of having different entry
points for different harts, but that's no longer true.
Also get rid of a bunch of trailing whitespace.
9 years ago
a327416eac
Remove reference to H-mode in ECALL
9 years ago
3a4e89322a
Merge pull request #113 from riscv/debug_readme
Update README to use --rbb-port
9 years ago
1e2518d415
Support 64-bit start PCs in reset vector.
9 years ago
c354cfe89c
Update README to use --rbb-port
9 years ago
f65e7e585f
Merge pull request #112 from riscv/autoexecwrite
Return success on writes to abstractauto
9 years ago
071610e2b2
Return success on writes to abstractauto
This bug was exposed by newer OpenOCD which actually checks the result.
9 years ago
5307bcf478
Merge pull request #110 from riscv/debug_rom_build
`make clean && make` works again in debug_rom
9 years ago
c4cb4a5de9
Merge pull request #111 from riscv/dtm_reset_error
Reset to "success" instead of "error."
9 years ago
1a904654f1
Reset to "success" instead of "error."
OpenOCD actually checks this initial value now, and there's no reason
for it to indicate error.
9 years ago
290115aeac
`make clean && make` works again in debug_rom
9 years ago
3e92055f83
Forbid S-mode execution from user memory
285c81746f
9 years ago
Tim Newsome
Andrew Waterman
Andrew Waterman
Christopher Celio
Gleb Gagarin
Kito Cheng
Palmer Dabbelt
Evan Cox
jar