riscv
/
riscv-isa-sim
mirror of https://github.com/riscv-software-src/riscv-isa-sim.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
326 Commits
52 Branches
3 Tags
18 MiB
Tree: 287a1f87ca
Branches Tags
${ item.name }
Create tag ${ searchTerm }
Create branch ${ searchTerm }
from '287a1f87ca'
${ noResults }
Commit Graph

326 Commits (287a1f87ca850b3583c27a1f178aaee28e02f2df)
 

Author SHA1 Message Date
Andrew Waterman 287a1f87ca Require libdl for dynamic linking at runtime
12 years ago
Andrew Waterman 816893bbe7 Disassemble amoxor
12 years ago
Andrew Waterman 471a5fe748 Build and use shared libraries only
12 years ago
Andrew Waterman 4a2f98e35f Build and use shared libraries
12 years ago
Andrew Waterman 127fdd1d94 Handle CSR permissions correctly
12 years ago
Andrew Waterman 2fa668a2d0 Use auto-generated trap cause numbers
12 years ago
Quan Nguyen bd9a5a429d Merge branch 'confprec'
12 years ago
Andrew Waterman 733dc842be Initialize tohost and fromhost to zero
12 years ago
Andrew Waterman 77f2815807 Improve performance for branchy code
12 years ago
Andrew Waterman 7f457c47b3 Speed things up quite a bit
13 years ago
Andrew Waterman e85cb99c5e New RDCYCLE encoding
13 years ago
Quan Nguyen 64785705a4 Remove debug printf in vsetprec
13 years ago
Quan Nguyen 05f9118e82 Add vsetprec instruction prototype
13 years ago
Andrew Waterman aedcd67ac8 Update to new privileged ISA
13 years ago
Quan Nguyen af0a019881 Merge branch 'master' of github.com:ucb-bar/riscv-isa-sim into HEAD
13 years ago
Yunsup Lee ee7867e79e fix slli/slliw encoding bug
13 years ago
Yunsup Lee 15ca044738 add accelerator disabled cause
13 years ago
Yunsup Lee d0a84535eb correctly trap when SR_EA is disabled
13 years ago
Albert Ou ad42696405 Fix declaration of half-precision instructions
13 years ago
Albert Ou c258e24c0a Re-add Hwacha header file
13 years ago
Albert Ou 826fc1719a Implement "half-baked" half-precision instruction subset for Hwacha
13 years ago
Albert Ou 05bd63e022 Merge branch 'master' of github.com:ucb-bar/riscv-isa-sim into confprec
13 years ago
Yunsup Lee 692ba09ef4 include stdexcept
13 years ago
Andrew Waterman d5204838b7 Pass target machine's return code back to OS
13 years ago
Quan Nguyen 6ca90a89e5 Add missing fcvt opcodes through riscv-opcodes
13 years ago
Yunsup Lee 1bcda9195b clarify vxcptsave/vxctkill semantics
13 years ago
Yunsup Lee 74fe66dcec implement vxcptsave/vxcptrestore
13 years ago
Yunsup Lee e638446bd9 clean up SR_EA, the enable accelerator bit in status reg
13 years ago
Yunsup Lee 787450f4d9 more hwacha supervisor stuff
13 years ago
Yunsup Lee cb6cfc5f3a refactor disassembler, and add hwacha disassembler
13 years ago
Yunsup Lee 9543d241b3 can't execute frsr/fssr on ut
13 years ago
Yunsup Lee 185b0d177d or into control thread's fp exceptions
13 years ago
Quan Nguyen 3676772fd0 Add empty opcode header files for half-precision
13 years ago
Yunsup Lee 1057bae0a0 catch trap_illegal_instruction in hwacha
13 years ago
Yunsup Lee 0f140bcde4 add hwacha exception support
13 years ago
Yunsup Lee 289e2118cb fix custom-1 rocc encoding
13 years ago
Yunsup Lee 1276dd07f7 fix maxvl calc logic
13 years ago
Yunsup Lee da579c14c9 use reset virtual method
13 years ago
Yunsup Lee 38c39525ac use uint32_t for vl
13 years ago
Yunsup Lee 196370f186 fix missing null check when there's no extension
13 years ago
Yunsup Lee 2f1f9a4fbc revamp hwacha; now runs in physical mode
13 years ago
Stephen Twigg cabb915003 Propogate the reset call to the extensions as well. Add reset function to extensions (demonstration in dummy acc)
13 years ago
Stephen Twigg 658188c92b Fix bug where xs2 was not being properly respected.
13 years ago
Yunsup Lee 61d215fc61 commit configure script; new configure option --enable-commitlog
13 years ago
Christopher Celio b9dc340b75 Added commit logging (--enable-commitlog). Also fixed disasm bug.
13 years ago
Andrew Waterman c8a8c07ec2 Use WRITE_RD/WRITE_FRD macros to write registers
13 years ago
Andrew Waterman 6554cdd3fb Bye, CB
13 years ago
Scott Beamer 548315acd9 fixes compile bug for not being able to find std::logic_error
13 years ago
Andrew Waterman 2deb1197bc Fix Scott's deadlock
13 years ago
Stephen Twigg 0cada7f60d Adjust rocc_inst_t to properly extract fields due to the new ISA encoding.
13 years ago