Andrew Waterman
|
a5f6dda2bc
|
Remove VLAs in DTM (-Wvla)
|
1 year ago |
|
Andrew Waterman
|
3f0081afd8
|
Fix overflow warning (-Woverflow)
|
1 year ago |
|
Andrew Waterman
|
2c26357d0c
|
Remove non-ISO compound literals (-Wpedantic)
|
1 year ago |
|
Andrew Waterman
|
8006a64768
|
Remove zero-sized arrays (-Werror)
|
1 year ago |
Jerry Zhao
|
cf5d11c987
|
Unify fesvr/debug_defines.h and riscv/debug_defines.h
* fesvr/debug_defines.h is removed
|
3 years ago |
|
Jerry Zhao
|
4d4159e76d
|
Pull memif_endianness_t into cfg.h
|
3 years ago |
|
Andrew Waterman
|
e52327deee
|
Fix build of dtm.cc on RISC-V targets
We don't actually need encoding.h, so don't include it.
|
4 years ago |
Schuyler Eldridge
|
b3855682c2
|
Add missing stdexcept imports
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
|
6 years ago |
Chih-Min Chao
|
b6f7b65b65
|
op: update CSR
1. add new hypervisor csr
2. add debug module csr
3. add some new high part register for rv32
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
|
6 years ago |
|
Andrew Waterman
|
acd953afd2
|
When enabling the debug module, poll til it's really enabled
Resolves #435
|
6 years ago |
Megan Wachs
|
b8eb9cd50d
|
FESVR: ensure dmactive is 1 before reading debug module registers
|
6 years ago |
|
Megan Wachs
|
6b90a455dc
|
FESVR: Can't read a DM register when DMACTIVE=0
|
6 years ago |
|
Andrew Waterman
|
f49618ca9d
|
Add fesvr; only globally install fesvr headers/libs
|
7 years ago |
