Tree: 14d1f76a57

arromanoff/makefile-type

arrv-sc-arrv-sc/snippy-tests

confprec

cs250

cycleh

debug_rom

debug_rom_fence

device_flags

dtm_reset_error

dts_parsing

dynamic

eos18-bringup

factor-out-macros

fetch

fix-bf16

force-rtti

fp-encoding

heterogeneous_mc

hwachav4

increase-stack-size

itrigger-etrigger-cleanup

load_reservation_set_size

log-commits-faster

master

mmio-hack

mvp

no_progbuf

no_progbuf2

nolibfdt

optimized-chunk-size

p-ext-0.5.2

plctlab-plct-zce-fix2

plic-clint-endian

plic_uart_v1

priv-1.10

private-l1-caches

pte-info-and-delegation

remove-tests

rivosinc-etrigger_fix_exception_match

rva-profile-support

sanitize

simplify-misaligned

sodor

sparse-mem

speed2

speedup-hacks

static-link

test

tmp

trigger_priority

tweak_debug_rom

whole-archive

zvmm

dummy-tag-for-ci-storage

v1.0.0

v1.1.0

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Commit Graph

2680 Commits (14d1f76a572d23e9e407a8cc6d952146fc2a888c)

 

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Author	SHA1	Message	Date
Andrew Waterman	591e622923	Merge pull request #1196 from riscv-software-src/readme_address Change address used in gdb debug example.	4 years ago
Tim Newsome	b282cafd59	Change address used in gdb debug example. PR #889 put a UART at 0x10000000, which conflicts with the old address. Fixes #1179.	4 years ago
Andrew Waterman	c94cafa66a	Merge pull request #1195 from riscv-software-src/mmio_type Expose access type in simif_t mmio_load interface	4 years ago
Andrew Waterman	205d8db0a8	Merge pull request #1194 from riscv-software-src/clean-up-makefiles Remove dead code in Makefiles	4 years ago
Jerry Zhao	15635c2553	Add mmio_fetch to simif_t to distinguish between fetch/load for mmio accesses	4 years ago
Andrew Waterman	dfc9b5fce1	Remove dead code in Makefile.in	4 years ago
Andrew Waterman	540c3ce056	Remove non-installed header lists from Makefile fragments It's just dead code. (Dependences on headers are auto-generated as `.d` files.)	4 years ago
Andrew Waterman	3349dc5113	Merge pull request #1192 from riscv-software-src/improve-histogram Slightly improve histogram feature	4 years ago
Andrew Waterman	662a00c595	Merge pull request #1191 from riscv-software-src/always_histogram Support histogram feature without configure option	4 years ago
Andrew Waterman	4ecbaf15df	Merge pull request #1147 from riscv-software-src/extension-namespace Support more than 65 Z* extensions	4 years ago
Andrew Waterman	8ed1919047	Merge pull request #1193 from riscv-software-src/fix-build-nondeterminism Fix build nondeterminism by deleting archives before recreating	4 years ago
Andrew Waterman	af399342a4	Fix build nondeterminism by deleting archives before recreating Otherwise, `ar rcs` will add to the previous archive, creating the possibility of multiple functions with the same name in the archive. The linker might not choose the most recent version, resulting in undefined behavior.	4 years ago
Andrew Waterman	d6e5a0ed89	Speed up histogramming by changing data structure Since we no longer rely on the map's order, use unordered_map.	4 years ago
Andrew Waterman	ea70167d28	Sort histogram printout count, rather than address	4 years ago
Andrew Waterman	b5f68dc55c	Remove --enable-histogram option It's now redundant.	4 years ago
Andrew Waterman	7831b3e5f2	Only clear logging structures if logging is enabled This speeds up histogramming when logging is disabled, with almost no slowdown for the logging case.	4 years ago
Andrew Waterman	242f23064e	Always use slow path for histogramming Speeds up fast path after unconditionally enabling histogram.	4 years ago
Andrew Waterman	c379868bd9	Support histogram regardless of configure flag	4 years ago
Andrew Waterman	edcf2d59b7	Merge pull request #1190 from riscv-software-src/reduce-compile-time Reduce compile time increase introduced by #1189	4 years ago
Andrew Waterman	9152a02ac1	Reduce compile time increase introduced by #1189 Generate one object file per instruction rather than two, which reduces the overhead of invoking the compiler so many times. This also reduces the size of the (unstripped) binary substantially.	4 years ago
YenHaoChen	9f3372a8e3	triggers: add mcontrol6 trigger	4 years ago
YenHaoChen	730152610a	triggers: refactor: add mcontrol_common_t::legalize_match() function	4 years ago
YenHaoChen	efc5420c6d	triggers: refactor: remove redundant namespace qualifiers	4 years ago
YenHaoChen	c0fddfd661	triggers: refactor: extract mcontrol_common_t from mcontrol_t	4 years ago
YenHaoChen	72daa815a2	triggers: refactor: update trigger_t::mode_match()	4 years ago
YenHaoChen	015fc185a4	triggers: refactor: add trigger_t::mode_match() function	4 years ago
Andrew Waterman	dc13989f19	Support more than 65 Z* extensions The isa_extension_t enum already has 44 extensions. In not too long, the enum will grow in size to 65, when it will collide with the 'A' extension. Fix that preemptively by starting after 'Z'. This approach will run out of steam at 165 extensions because we are using `unsigned char` to represent extensions, but opefully we will have retired by that point. In seriousness, we will probably need to refactor the extension_enabled logic at some point in the future (e.g. when the configuration structure is finally added) and at that point we should lift the `char` limit.	4 years ago
YenHaoChen	1f2f68962c	triggers: refactor: move m/s/u/vs/vu to trigger_t	4 years ago
YenHaoChen	ae016f835c	triggers: refactor: add mcontrol.vs and mcontrol.vu	4 years ago
YenHaoChen	5f85e8fac0	triggers: refactor: cleaner vs and vu checking	4 years ago
Andrew Waterman	3cb3d10f05	Merge pull request #1189 from riscv-software-src/always_commitlog Always support commit-logging without performance penalty	4 years ago
Jerry Zhao	919c9a1e3c	Always build with commit logging support	4 years ago
Jerry Zhao	e33913c886	Add logged instruction variants to insn_desc_t	4 years ago
Jerry Zhao	2493734383	Add logged variants of insn templates	4 years ago
Jerry Zhao	2a4cdffc4f	Replace compile-time commitlog check with runtime check for vector writes	4 years ago
Jerry Zhao	20634d0573	Replace compile-time conditional with run-time conditional for load/store logging	4 years ago
Jerry Zhao	83d0a87bb4	Split execute_insn into fast and logged variants Fast variant should only be used when logging is disabled	4 years ago
Jerry Zhao	10dedb311b	Force slow-path when commit-logging is enabled	4 years ago
Jerry Zhao	6c8fb97f44	Always compile commit-log utility functions	4 years ago
Jerry Zhao	0f85dacdb5	Check commitlog-enable dynamicallly for csr_t::log_special_write This incurs a negligible performance impact	4 years ago
Jerry Zhao	f8592e43eb	Always reset commit logging variables	4 years ago
Jerry Zhao	9789b250f0	Always perform symbol lookup in debug	4 years ago
Jerry Zhao	43847f5ae0	Fix compile error in commit-logging code	4 years ago
Andrew Waterman	4918a50cd4	Merge pull request #1187 from riscv-software-src/sensibleclint Allow reads/writes to reserved CLINT regions	4 years ago
Jerry Zhao	1b06630727	Allow reads/writes to reserved CLINT regions Previously, all loads/stores to reserved regions caused access faults. Now, loads to reserved regions return 0, while writes are dropped. This more closely matches actual hardware implementations	4 years ago
Andrew Waterman	203bc302b0	Merge pull request #1186 from ssayin/master arith.h: remove redundant y1 = t; in mulhu(uint64_t, uint64_t)	4 years ago
Serdar Sayın	72ee60bed3	arith.h: remove redundant y1 = t; in mulhu(uint64_t, uint64_t) local y1 is set to local t y1 is never accessed in the lines that follow	4 years ago
Andrew Waterman	788b295932	Merge pull request #1184 from riscv-software-src/libriscv Support using sim.h/processor.h as public interfaces	4 years ago
Jerry Zhao	46e6be48e9	Add github actions test that installed headers are usable	4 years ago
Jerry Zhao	67219b20a3	Remove processor.h/sim.h -> config.h dependencies	4 years ago