1474 Commits (0f264a174ed6ec1cf18bf7d34aed79cdf2deb66d)
 

Author SHA1 Message Date
Andrew Waterman 0f264a174e Install fesvr/byteorder.h to fix #622 6 years ago
Chih-Min Chao 032a68c3e9
rvv: make fractional lmul checking simpler and stricter (#620) 6 years ago
Andrew Waterman 438999600c If misaligned accesses are enabled, throw access fault on misaligned LR/SC 6 years ago
Andrew Waterman 8deeb7d2ca
Merge pull request #619 from mehmetoguzderin/guess-new-arch-2020 6 years ago
Andrew Waterman 3a7bc7d6eb
Merge pull request #618 from avpatel/mmu_proc_fix_v1 6 years ago
Anup Patel 2aed3d24d9 Fix processor_t:take_interrupt() for HS-mode interrupts 6 years ago
Mehmet Oguz Derin a8791f2d6e Update config file to support aarch64 6 years ago
Anup Patel 11389c9d5a Check and use proc variable in MMU emulation 6 years ago
Andrew Waterman 236de4dbfa Add Zba/Zbb to disassembler 6 years ago
Andrew Waterman 790cfbcc88
Merge pull request #616 from chihminchao/misc-fix-2020-12-14 6 years ago
Dave.Wen 9224c93cc0 rvv: fix the v[z|s]ext about elmul checking. 6 years ago
Chih-Min Chao e88a30c229 disasm: show fench's predecessor and successor 6 years ago
Chih-Min Chao bf3a588afd dts: mmu: replace 'riscv,bare' by 'riscv,sbare' 6 years ago
Tim Newsome 4e3d8df5a8
Preserve abstract s0 write if progbuf excepts. (#615) 6 years ago
Daniel Lustig d74b2cd324
Oops...napot_bits should use ctz, not clz (#614) 6 years ago
Andrew Waterman a760df2d32
Merge pull request #613 from chihminchao/rvv-fix-2020-12-04 6 years ago
Dave.Wen b8c05a222d rvv: check the vz/sext's eew 6 years ago
Dave.Wen 6d9617bdb8 rvv: update the fractional lmul checking rule to rvv1.0-draft 6 years ago
Chih-Min Chao 21458a2710
rvv: index load/store have benn separated into ordered and unordered parts (#611) 6 years ago
Andrew Waterman 654480447f Remove stray comma in configure 6 years ago
Will Hawkins 0cb148a051
Fix Issue #609 (#610) 6 years ago
Will Hawkins f4f6e12eee
Fix #607: Add a core parameter to the interactive str command (#608) 6 years ago
Andrew Waterman 4b04d71529
Merge pull request #605 from avpatel/riscv_gva_fix_v1 6 years ago
Anup Patel d0d923ebde Fix typo in HTVAL CSR write emulation 6 years ago
Anup Patel 457f628ad7 Fix hstatus.GVA and mstatus.GVA updation 6 years ago
Daniel Bates d6cf0d2363
Include stdexcept in ELF loader (#603) 6 years ago
Marcus Comstedt a73e43f231
Fix misaligned loads and stores for big endian target (#602) 6 years ago
Anup Patel 8be5c086bd
Fix VSSTATUS bits updation (#568) 6 years ago
Andrew Waterman e2e83c0604 Don't include PTE.N bit as part of the PPN 6 years ago
Andrew Waterman ec00b9bc69 Invalid NAPOT settings cause page faults, not access exceptions 6 years ago
Andrew Waterman fce242a5d4 Add Zsn extension 6 years ago
Andrew Waterman 081bcaddc5 Avoid use of __builtin_popcount for portability 6 years ago
Andrew Waterman b2a2f24692 Avoid use of __builtin_ctz for portability 6 years ago
Andrew Waterman 29178e659d Avoid use of __builtin_bswap for portability 6 years ago
Andrew Waterman a081a013f3 Only use __builtin_expect for __GNUC__ 6 years ago
Marcus Comstedt a4994cba0d
Fix byteorder issues with struct riscv_stat (#596) 6 years ago
Andrew Waterman 77d84472c9
Merge pull request #598 from chihminchao/pmp-per-core 6 years ago
Chih-Min Chao b4aa36c4ba dts: config pmp attribute by each core's setting 6 years ago
Chih-Min Chao 0ca970dce3 dts: extract cpu node checking as helper function 6 years ago
Scott Johnson 70fdec9e63
Correct AMO exception cause for misaligned accesses (#594) 6 years ago
Andrew Waterman 828d8553dc
Merge pull request #592 from scottj97/fix-misaligned-lr 6 years ago
Andrew Waterman 9380375e22
Merge pull request #593 from chihminchao/selective-mmu-mode 6 years ago
Chih-Min Chao b675e0af5b dts: mmu: parse mmu-type in dts 6 years ago
Chih-Min Chao 0481b56f34 dts: extend dts api to get info of each cpu 6 years ago
Chih-Min Chao bed716c601 mmu: check mmu support 6 years ago
Chih-Min Chao 51b5702b69 mmu: extract common part of satp and vsatp setting 6 years ago
Chih-Min Chao ad8ef88a22 mmu: add impl table and set function 6 years ago
Scott Johnson e91092f219
Use new require_alignment flag to simplify AMO check 6 years ago
Scott Johnson f019910e12
Make LR properly take misaligned exception 6 years ago
Andrew Waterman 956ef9ac3a Update readme to reflect bi-endian support 6 years ago