Branch: speed2

arrv-sc-arrv-sc/snippy-tests

confprec

cs250

cycleh

debug_rom

debug_rom_fence

device_flags

dtm_reset_error

dts_parsing

dynamic

eos18-bringup

factor-out-macros

fetch

fix-bf16

force-rtti

fp-encoding

heterogeneous_mc

hwachav4

increase-stack-size

itrigger-etrigger-cleanup

load_reservation_set_size

log-commits-faster

master

mmio-hack

mvp

no_progbuf

no_progbuf2

nolibfdt

p-ext-0.5.2

plctlab-plct-zce-fix2

plic-clint-endian

plic_uart_v1

priv-1.10

private-l1-caches

pte-info-and-delegation

remove-tests

rivosinc-etrigger_fix_exception_match

rva-profile-support

sanitize

simplify-misaligned

sodor

sparse-mem

speed2

speedup-hacks

static-link

test

tmp

trigger_priority

tweak_debug_rom

whole-archive

zvmm

dummy-tag-for-ci-storage

v1.0.0

v1.1.0

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Commit Graph

3476 Commits (speed2)

 

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Author	SHA1	Message	Date
Jerry Zhao	9fd52a7113	Split off opcode_cache_entry_t	1 year ago
Jerry Zhao	d56f15e727	Rename opcode_cache_set_t fields to be more descriptive	1 year ago
Jerry Zhao	feb4a54edf	Accurately rename opcode_cache_entry_t to opcode_cache_set_t	1 year ago
Jerry Zhao	5b0fdf897f	Reduce cache footprint of insn_t	1 year ago
Jerry Zhao	aa3b6256a1	Predecode common instructions	1 year ago
Jerry Zhao	d6f5151cf9	predecode rvi instructions	1 year ago
Jerry Zhao	de4235364d	working partially	1 year ago
Jerry Zhao	ab79d096fe	Pass insn_bits to processor->decode_insn	1 year ago
Jerry Zhao	35d46269d6	Un-inline refill_icache This is a big function - the overhead of un-inlining it should be negligible	1 year ago
Jerry Zhao	190bb224fd	Use BODY guards in insn headers	1 year ago
Andrew Waterman	88fc84ded1	Merge pull request #1839 from ved-rivos/issue_1838 add missing sdt/sie interaction when writing mstatus directly	1 year ago
Ved Shanbhogue	8566627eeb	add missing sdt/sie interaction when writing mstatus directly	1 year ago
Andrew Waterman	fa694e2ae3	Merge pull request #1835 from joe-rivos/fix-ignored-attributes-warning Fix ignored-attributes warning for unique_ptr declaration	1 year ago
Joseph Faulls	a93eb1b808	Fix ignored-attributes warning for unique_ptr declaration The attribute `__nonnull` was added to `fclose` in glibc 2.38, which causes a warning when using its `decltype` on a template argument.	1 year ago
Andrew Waterman	aacfc53770	Merge pull request #1834 from aap-sc/master update encoding.h to get rid of erroneous define	1 year ago
Parshintsev Anatoly	f0a0655a80	update encoding.h to get rid of erroneous define	1 year ago
Andrew Waterman	824ecdf6dc	Merge pull request #1829 from NXP/update-zilsd-to-v0.10 Updated load/store pair for RV32 to v0.10	2 years ago
Christian Herber	ff771919ec	Updated load/store pair for RV32 to v0.10 - renamed Zcmlsd to Zclsd - bumped version number	2 years ago
Andrew Waterman	061a6eaf7b	Merge pull request #1822 from howjmay/typos fix typos	2 years ago
Yang Hau	a41954235b	fix typos	2 years ago
Andrew Waterman	1cf354f9c9	Merge pull request #1823 from YenHaoChen/pr-halt Change -H flag into --halted	2 years ago
Andrew Waterman	382a52638f	Merge pull request #1826 from riscv-software-src/fix-1825 Fix f64_to_bf16 raising underflow when it shouldn't	2 years ago
YenHaoChen	aadd792d6a	Change -H flag into --halted There is a comment about aiming at --halted but failing to achieve so. This commit provides the behavior.	2 years ago
Andrew Waterman	c3f324ff56	Fix f64_to_bf16 raising underflow when it shouldn't Resolves #1825	2 years ago
Andrew Waterman	c95a2cbd68	Merge pull request #1819 from riscv-software-src/ss-cbo-fault Raise store/AMO access fault on CBO to shadow-stack page	2 years ago
Andrew Waterman	00cf1eb2a8	Merge pull request #1820 from YenHaoChen/pr-halt refactor: Remove dcsr::halt variable	2 years ago
YenHaoChen	5c814c7134	refactor: Merge halt and halt_on_reset variables in processor_t	2 years ago
YenHaoChen	871d9453eb	refactor: Move halt out of dcsr Suggested in https://github.com/riscv-software-src/riscv-isa-sim/pull/1816#pullrequestreview-2331806142.	2 years ago
Andrew Waterman	d30dc8e43b	Raise store/AMO access fault on CBO to shadow-stack page Proliferating the access_flags isn't ideal, but it wasn't clear how better to handle this case.	2 years ago
Andrew Waterman	666da337f8	Merge pull request #1816 from YenHaoChen/pr-halt Only enter debug mode once with -H flag (halt_on_reset)	2 years ago
YenHaoChen	6f05a29995	Only enter debug mode once with -H flag (halt_on_reset)	2 years ago
Andrew Waterman	de5094a1a9	Merge pull request #1812 from riscv-software-src/fix-1810 Further improve ISA-string input validation	2 years ago
Andrew Waterman	9a641bb03e	Validate Zvl ISA string correctly See #1810 for explanation of how this can go wrong. Resolves #1810	2 years ago
Andrew Waterman	19fdd76e05	Merge pull request #1811 from riscv-software-src/fix-1810 Validate Zvl ISA string correctly	2 years ago
Andrew Waterman	6b74bd669d	Validate Zvl ISA string correctly See #1810 for explanation of how this can go wrong. Resolves #1810	2 years ago
Andrew Waterman	52aff0233f	Merge pull request #1804 from ved-rivos/ssdbltrp_typo Fix error in reading right sstatus	2 years ago
Ved Shanbhogue	a8525b6243	fix error in reading right sstatus	2 years ago
Jerry Zhao	0cc5ecce05	Merge pull request #1807 from riscv-software-src/remove-compile-flags Remove --with-isa/priv compile flags	2 years ago
Jerry Zhao	c187be0a1e	Remove leftover config.h includes in dasm/log-parser	2 years ago
Jerry Zhao	b47080fea4	Remove --with-priv compile flag	2 years ago
Jerry Zhao	d90e6df9c3	Remove --with-isa compile-time option	2 years ago
Andrew Waterman	2e816f23cb	Merge pull request #1796 from cyyself/tmp_mcountinhibit add support for mcountinhibit CSR	2 years ago
YenHaoChen	d7ded0cf85	Merge pull request #1793 from rtwfroody/native_triggers2 Only implement one solution for native triggers.	2 years ago
Tim Newsome	0703b44b77	Only implement one solution for native triggers. When S-mode is present, use option 1 (disable triggers in M-mode unless MIE is set) from the Debug Spec. When S-mode is not present, use option 2 (implement mte and mpte bits in tcontrol). See discussion in #1777.	2 years ago
Tim Newsome	451a7dcdd7	triggers: Move allow_action() into common_match() They are always called together, and now we get the previous privilege behavior in both.	2 years ago
Tim Newsome	4abd669b3d	Make allow_action() take proc instead of state	2 years ago
Tim Newsome	9c5a20fbdb	Work if tcontrol doesn't exist.	2 years ago
Yangyu Chen	5a6b789855	add support for mcountinhibit CSR We hardwired mcountinihibit to 0 previously. Now, we implemented it. Signed-off-by: Yangyu Chen <cyy@cyyself.name>	2 years ago
Andrew Waterman	cb78f095de	Merge pull request #1797 from YenHaoChen/pr-vector vector: disassemble: Let operand ordering be vd, [vrf]s1, vs2 to vector multiply-add instructions	2 years ago
YenHaoChen	6a1a5db16b	vector: disassemble: Let operand ordering be vd, [vf]s1, vs2 to vector widening floating-point fused multiply-add instructions	2 years ago