riscv-isa-sim

Commit Graph

Author	SHA1	Message	Date
Andrew Waterman	8ad998f0e7	Add --strict command-line arg to spike-dasm	1 year ago
Jerry Zhao	c187be0a1e	Remove leftover config.h includes in dasm/log-parser	2 years ago
Jerry Zhao	d90e6df9c3	Remove --with-isa compile-time option	2 years ago
Jerry Zhao	e1919d3b06	Add config.h includes directly to source files instead of relying on header chaining This step is to ensure that removing config.h out of headers will not cause regressions.	3 years ago
Andrew Waterman	a51e44ed22	Fix or work around other unused-parameter warnings in ancillary programs	4 years ago
Andrew Waterman	d2020b3256	Zero-extend instructions in spike-dasm ...since we no longer rely on their being sign-extended.	4 years ago
Rupert Swarbrick	59ec157568	Incorporate supported privilege levels into isa_parser_t (#940 ) These affect the "max_isa" value (now exposed as get_max_isa()) and feel like they're similar to the other computations done in isa_parser_t.	4 years ago
Weiwei Li	a68d310bcb	Bind disas for instructions with the isa support	4 years ago
Weiwei Li	d685520fed	Use unified ISA-string processing in spike-dasm and spike	4 years ago
Andrew Waterman	59d450e586	Separate build of spike and spike-dasm	6 years ago
Andrew Waterman	bb1cd8f9e3	Decouple spike-dasm program from simulator code	6 years ago
Andrew Waterman	8ffefbc9a1	Add --priv option to control which privilege modes are available	6 years ago
Chih-Min Chao	48fe0c484d	rvv: add varch option parser and initialize vector unit the default vector parameters are defined in configuration time but can be changed throught command-line option Signed-off-by: Dave Wen <dave.wen@sifive.com>	7 years ago
Andrew Waterman	aff796dbf6	Handle spike-dasm inputs with leading 0x correctly	8 years ago
Andrew Waterman	03b8bad375	Disassemble RVC instructions based on XLEN The interpretation of RVC opcodes depends on XLEN, and the disassembler always assumed RV32. h/t Michael Clark	10 years ago
Yunsup Lee	9af855a28e	correctly parse extension for spike-disasm	11 years ago
Andrew Waterman	d8022e9eda	properly sign-extend instructions in spike-dasm	11 years ago
Andrew Waterman	17fd25f267	Rename riscv-dis to spike-dasm This is a better name, since it looks for the string DASM(xxx), and it fixes tab completion for the cross compiler.	11 years ago
Andrew Waterman	416c8be88c	Support building from within root directory	11 years ago
Andrew Waterman	d643e43dca	Support 2/4/6/8-byte instructions Most of the complexity is in instruction address translation, since instructions may span page boundaries.	11 years ago
Andrew Waterman	590417bec9	Factor out the dummy RoCC accelerator	12 years ago
Scott Beamer	0ac8a9b068	clean up warnings from clang	12 years ago
Yunsup Lee	0a048a93eb	add extensions to riscv-dis for better disassembly	12 years ago
Yunsup Lee	cb6cfc5f3a	refactor disassembler, and add hwacha disassembler	13 years ago
Andrew Waterman	620d8bc0fe	Add helper disassembly program	13 years ago

10 Commits (master)