riscv-isa-sim

Commit Graph

Author	SHA1	Message	Date
Sevan Janiyan	7f8c22b337	autoreconf --install	1 year ago
Jerry Zhao	b47080fea4	Remove --with-priv compile flag	2 years ago
Jerry Zhao	d90e6df9c3	Remove --with-isa compile-time option	2 years ago
Jerry Zhao	3b6a8fa06e	Remove all --varch parsing	2 years ago
Gianluca Guida	b3a3063b57	configure.h: Add HAVE_INT128 Modify configure.ac to generate a header that expose the support for 128-bit integers.	3 years ago
Jerry Zhao	5e366af773	Update configure/config.h.in Ran autoreconf in top directory, version 2.69	3 years ago
Jerry Zhao	e7f1798b5d	Remove --enable-dirty compile option	3 years ago
Andrew Waterman	1aac9da38f	Delete --enable-misaligned configure option	3 years ago
Andrew Waterman	b5f68dc55c	Remove --enable-histogram option It's now redundant.	3 years ago
Jerry Zhao	919c9a1e3c	Always build with commit logging support	3 years ago
emelcher	01be71430c	configure option --with-target (#776 ) * add configure option --with-target * executed autoconf	5 years ago
emelcher	1f58b4d869	configure for boost lib	5 years ago
Marcus Comstedt	ec2fd09fdb	Update generated configure script	6 years ago
Andrew Waterman	b1dc3826d0	Don't error out if dlopen isn't available	6 years ago
Andrew Waterman	8ffefbc9a1	Add --priv option to control which privilege modes are available	6 years ago
Chih-Min Chao	004649e9e5	rvv: add configuration and command-line option 1. configure option "--with-varch" the option defines the default u-arch implementatiton-decided parameter VLEN: vector register length in bit SLEN: striping distance in bit ELEN: max element size in bit ex: --with-vector=v128:e32:s128 2. add __int128_t type checking 3. add --varch command option and help message ex: --varch=v512:e64:s512 Signed-off-by: Dave Wen <dave.wen@sifive.com>	7 years ago
Andrew Waterman	1132fdf4f0	Add --enable-misaligned option for misaligned ld/st support Resolves #93	9 years ago
Wesley W. Terpstra	c71db7787b	autoconf: put location of 'dtc' into config.h	9 years ago
Andrew Waterman	67cd71d9ec	Make HW setting of PTE A/D bits optional (by configure arg) https://github.com/riscv/riscv-isa-manual/issues/14	9 years ago
Andrew Waterman	10ae74e48a	Allow configuration of default ISA with --with-isa	10 years ago
Andrew Waterman	c4350ef6ef	Support setting ISA/subsets with --isa flag Default is RV64IMAFDC. Can do things like --isa=RV32 (which implies IMAFDC) --isa=IM (which implies RV64) --isa=RV64IMAFDXhwacha	11 years ago
Andrew Waterman	7f3c072750	Implement RVC draft	11 years ago
Palmer Dabbelt	abc20b6543	autoreconf `65ba70071d`	11 years ago
Andrew Waterman	590417bec9	Factor out the dummy RoCC accelerator	12 years ago
Christopher Celio	616cc32c30	Added PC histogram option. - Spits out all PCs (on 4B granularity) executed with count. - Requires a compile time configuration option. - Also requires a run-time flag.	12 years ago
Andrew Waterman	2c1ddd1781	Enable runtime loading of dynamic library with --extlib	12 years ago
Andrew Waterman	287a1f87ca	Require libdl for dynamic linking at runtime	12 years ago
Yunsup Lee	0f140bcde4	add hwacha exception support	13 years ago
Yunsup Lee	61d215fc61	commit configure script; new configure option --enable-commitlog	13 years ago
Andrew Waterman	b357c97b24	Remove more vector stuff	13 years ago
Andrew Waterman	de5b42e923	change htif to link against libfesvr	13 years ago
Your Name	e7fb0404b8	Remove dependence on binutils We now have our own disassembler.	15 years ago
Andrew Waterman	77452a26e7	temporary undoing of renaming	15 years ago
Andrew Waterman	740f981cfd	[sim] renamed to riscv-isa-run	15 years ago
Andrew Waterman	481c9e8fd8	[sim] added icache simulator (disabled by default)	15 years ago
Yunsup Lee	4b534147c0	[sim] add disable option for vector	15 years ago
Andrew Waterman	3c6275887f	[sim,pk] reorganized status register	15 years ago
Andrew Waterman	8456c1e923	[pk, sim] added FPU emulation support to proxy kernel	16 years ago
Andrew Waterman	cbefaf68c7	[xcc, sim] changed instruction format so imm12 subs for rs2	16 years ago
Andrew Waterman	01c01cc36f	Reorganized directory structure Moved cross-compiler to /xcc/ rather than / Added ISA sim in /sim/ Added Proxy Kernel in /pk/ (to be cleaned up) Added opcode map to /opcodes/ (ditto) Added documentation to /doc/	16 years ago

40 Commits (master)