On C++11 and later, std::string is guaranteed to be null-terminated.
However, `*(str.end())` is NOT guaranteed to be '\0'.
So, we parse ISA string using C-style string buffer (raw pointers).
This allows them to share PARAM macro with narrowing right-shift instructions.
Rename VV_NSHIFT_PARAMS -> VV_NARROW_PARAMS so nclip, nsra, nsrl can share it.
(Same goes to VX_NSHIFT_PARAMS and VI_NSHIFT_PARAMS)
"ZiHintPause" extension adds PAUSE instruction (which is a special
encoding of FENCE instruction) that performs nothing in the simulator
but supported by its disassembler.
This commit adds dummy extension (which does nothing itself)
"ZiHintPause" to `processor_t::parse_isa_string` to prevent
"unsupported extension" error message.
In Spike, `fence.i` instruction is not masked by any extensions.
I assume that this is required.
This commit adds dummy extension (which does nothing itself)
"Zifencei" to `processor_t::parse_isa_string` to prevent
"unsupported extension" error message.
1f58b4d869 introduced a link error on my
Mojave machine, because making the Boost include path the highest-priority
one was forcing use of the system's libfdt.h. But the system's libfdt.h
unfortunately lacks the 'extern "C"' linkage modifier, causing link errors
when invoking FDT routines from C++ code.
Fix by making the Boost include path the lowest-priority one.
Because using two booleans gives the impression that there are four
possibilities. Since hideleg is itself masked by mideleg, there are
effectively only three choices, so make that explicit via enum.
Krypto 1.0 changes: Entropy source CSR, name.
List scalar crypto instruction groupings, as there is no single K extension.
Co-authored-by: Markku-Juhani O. Saarinen <mjos@mjos.fi>
Error log:
libriscv.a(processor.o): In function `state_t::reset(processor_t*, unsigned long)':
.../_build/../riscv/processor.cc:509: undefined reference to `state_t::num_triggers'
collect2: error: ld returned 1 exit status
Makefile:349: recipe for target 'spike-log-parser' failed
Signed-off-by: Eric Tang <tangxingxin1008@gmail.com>
After excuting vector load/store whole register instructions,
spike would be crashed when excuted the next vector instruction.
Signed-off-by: Eric Tang <tangxingxin1008@gmail.com>
Stringstream is very slow; it's faster to manipulate strings instead.
Also, handle the underscore-dot replacement as a preprocessing step,
rather than doing it redundantly every time.
Optimize the hash functions for RISC-V instruction encodings. This is
only a perf optimization; instructions that don't adhere to RISC-V
standard practice will still disassemble correctly, just more slowly.
Yueh-Ting (eop) Chen
John Ingalls
Andrew Waterman
Tsukasa OI
Scott Johnson
Elmar Melcher
Mohit Singla
Markku-Juhani O. Saarinen
eric-xtang1008
eric-xtang1008
marcfedorow
liweiwei90