riscv-isa-sim

Commit Graph

Author	SHA1	Message	Date
Andrew Waterman	1e80c6d236	Configure should fail if device-tree-compiler is not installed Fixes #107	9 years ago
Wesley W. Terpstra	c71db7787b	autoconf: put location of 'dtc' into config.h	10 years ago
Andrew Waterman	dd1913e777	Add autoconf check for little-endianness	11 years ago
Andrew Waterman	3bfc00ef2a	Compile debug symbols	11 years ago
Andrew Waterman	0873901c7c	Remove hwacha support Support for hwacha will continue on the ESP branch (see https://github.com/ucb-bar/esp-isa-sim).	11 years ago
Palmer Dabbelt	126beb482f	Install pkg-config files for Spike The actual Spike package consists of a whole bunch of libraries. This installs a pkg-config file for each generated library, and a meta pkg-config file (riscv-spike.pc) that links in all the other Spike libraries except dummy_rocc (which I figure isn't interesting). This allows me to package and install spike, and then use that package to build an extension library (so I don't have to fork Spike for my own ISA extension).	11 years ago
Andrew Waterman	60535c23a2	Fix autoconf for RHEL6	11 years ago
Andrew Waterman	b462e1f80b	Don't look for a simulator when cross compiling	12 years ago
Andrew Waterman	416c8be88c	Support building from within root directory	12 years ago
Andrew Waterman	590417bec9	Factor out the dummy RoCC accelerator	12 years ago
Andrew Waterman	306b7359e8	Suppress harmless warnings specifically, unused variables in auto-generated code.	12 years ago
Andrew Waterman	fb3be24671	Eliminate hwacha <-> riscv circular dependence We now split out the spike executable into another subproject, which depends on both rocket and hwacha	13 years ago
Andrew Waterman	017f62ac55	Merge softfloat_riscv into softfloat They really aren't independent libraries.	13 years ago
Andrew Waterman	471a5fe748	Build and use shared libraries only	13 years ago
Yunsup Lee	2f1f9a4fbc	revamp hwacha; now runs in physical mode	13 years ago
Andrew Waterman	04c2d491c4	Instructions are no longer member functions	13 years ago
Yunsup Lee	b3f7c6045c	change riscv-isa-run to spike	13 years ago
Andrew Waterman	55cc5d40ec	migrate to c++11	14 years ago
Andrew Waterman	de5b42e923	change htif to link against libfesvr	14 years ago
Andrew Waterman	77452a26e7	temporary undoing of renaming	15 years ago
Andrew Waterman	740f981cfd	[sim] renamed to riscv-isa-run	15 years ago
Andrew Waterman	e8d6925f0e	[sim,opcodes] improved sim build and run performance	15 years ago
Andrew Waterman	50ec828baf	[sim] integrated SoftFloat-3 with ISA sim; removed SoftFloat-2b	16 years ago
Andrew Waterman	2d75bf71bb	[xcc,sim] implement FP using softfloat The intersection of the Hauser FP and MIPS FP is implemented.	16 years ago
Andrew Waterman	01c01cc36f	Reorganized directory structure Moved cross-compiler to /xcc/ rather than / Added ISA sim in /sim/ Added Proxy Kernel in /pk/ (to be cleaned up) Added opcode map to /opcodes/ (ditto) Added documentation to /doc/	16 years ago

25 Commits (dtm_reset_error)