[sim, xcc] changed cvt/trunc to use GPRs for int args

this way, we don't have to futz with storing integers in recoded
floating-point registers.  too bad we lose some decoupling.

riscv/insns/cvt_d_l.h

@@ -1,3 +1,4 @@
+require64;
 require_fp;
-FRDR = i64_to_f64(FRS1);
+FRDR = i64_to_f64(RS1);
 set_fp_exceptions;

riscv/insns/cvt_d_w.h

@@ -1,3 +1,3 @@
 require_fp;
-FRDR = i32_to_f64(FRS1);
+FRDR = i32_to_f64(RS1);
 set_fp_exceptions;

riscv/insns/cvt_s_l.h

@@ -1,3 +1,4 @@
+require64;
 require_fp;
-FRDR = i64_to_f32(FRS1);
+FRDR = i64_to_f32(RS1);
 set_fp_exceptions;

riscv/insns/cvt_s_w.h

@@ -1,3 +1,3 @@
 require_fp;
-FRDR = i32_to_f32(FRS1);
+FRDR = i32_to_f32(RS1);
 set_fp_exceptions;

riscv/insns/cvtu_d_l.h

@@ -1,3 +1,4 @@
+require64;
 require_fp;
-FRDR = i64_to_f64(FRS1);
+FRDR = i64_to_f64(RS1);
 set_fp_exceptions;

riscv/insns/cvtu_d_w.h

@@ -1,3 +1,3 @@
 require_fp;
-FRDR = ui32_to_f64(FRS1);
+FRDR = ui32_to_f64(RS1);
 set_fp_exceptions;

riscv/insns/cvtu_s_l.h

@@ -1,3 +1,4 @@
+require64;
 require_fp;
-FRDR = i64_to_f32(FRS1);
+FRDR = i64_to_f32(RS1);
 set_fp_exceptions;

riscv/insns/cvtu_s_w.h

@@ -1,3 +1,3 @@
 require_fp;
-FRDR = ui32_to_f32(FRS1);
+FRDR = ui32_to_f32(RS1);
 set_fp_exceptions;

riscv/insns/trunc_l_d.h

@@ -1,3 +1,4 @@
+require64;
 require_fp;
-FRDR = f64_to_i64_r_minMag(FRS1,true);
+RDR = f64_to_i64_r_minMag(FRS1,true);
 set_fp_exceptions;

riscv/insns/trunc_l_s.h

@@ -1,3 +1,4 @@
+require64;
 require_fp;
-FRDR = f32_to_i64_r_minMag(FRS1,true);
+RDR = f32_to_i64_r_minMag(FRS1,true);
 set_fp_exceptions;

riscv/insns/trunc_w_d.h

@@ -1,3 +1,3 @@
 require_fp;
-FRDR = f64_to_i32_r_minMag(FRS1,true);
+RDR = f64_to_i32_r_minMag(FRS1,true);
 set_fp_exceptions;

riscv/insns/trunc_w_s.h

@@ -1,3 +1,3 @@
 require_fp;
-FRDR = f32_to_i32_r_minMag(FRS1,true);
+RDR = f32_to_i32_r_minMag(FRS1,true);
 set_fp_exceptions;

riscv/insns/truncu_l_d.h

@@ -1,3 +1,4 @@
+require64;
 require_fp;
-FRDR = f64_to_i64_r_minMag(FRS1,true);
+RDR = f64_to_i64_r_minMag(FRS1,true);
 set_fp_exceptions;

riscv/insns/truncu_l_s.h

@@ -1,3 +1,4 @@
+require64;
 require_fp;
-FRDR = f32_to_i64_r_minMag(FRS1,true);
+RDR = f32_to_i64_r_minMag(FRS1,true);
 set_fp_exceptions;

riscv/insns/truncu_w_d.h

@@ -1,3 +1,3 @@
 require_fp;
-FRDR = f64_to_ui32_r_minMag(FRS1,true);
+RDR = f64_to_ui32_r_minMag(FRS1,true);
 set_fp_exceptions;

riscv/insns/truncu_w_s.h

@@ -1,3 +1,3 @@
 require_fp;
-FRDR = f32_to_ui32_r_minMag(FRS1,true);
+RDR = f32_to_ui32_r_minMag(FRS1,true);
 set_fp_exceptions;