diff --git a/riscv/processor.cc b/riscv/processor.cc
index 81ffde87..2629b6cc 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -1294,6 +1294,7 @@ void processor_t::set_csr(int which, reg_t val)
       LOG_CSR(CSR_MSTATUS);
       LOG_CSR(CSR_FFLAGS);
       LOG_CSR(CSR_FRM);
+      LOG_CSR(CSR_FCSR);
       break;
     case CSR_VCSR:
       LOG_CSR(CSR_MSTATUS);