diff --git a/riscv/insns/vfncvt_f_x_w.h b/riscv/insns/vfncvt_f_x_w.h index 2d4a167d..676cd3ae 100644 --- a/riscv/insns/vfncvt_f_x_w.h +++ b/riscv/insns/vfncvt_f_x_w.h @@ -2,9 +2,9 @@ VI_NON_ALTFMT_INSN VI_VFP_NCVT_INT_TO_FP( - { vd = i32_to_f16(vs2); }, // BODY32 - { vd = i64_to_f32(vs2); }, // BODY64 - { require_extension(EXT_ZVFH); }, // CHECK32 - { require_extension('F'); }, // CHECK64 - int // sign + { vd = i32_to_f16(vs2); }, // BODY32 + { vd = i64_to_f32(vs2); }, // BODY64 + { require_extension(EXT_ZVFH); }, // CHECK32 + { require(p->get_isa().get_zvf()); }, // CHECK64 + int // sign ) diff --git a/riscv/insns/vfncvt_f_xu_w.h b/riscv/insns/vfncvt_f_xu_w.h index 92c81ac3..f90d3d7e 100644 --- a/riscv/insns/vfncvt_f_xu_w.h +++ b/riscv/insns/vfncvt_f_xu_w.h @@ -2,9 +2,9 @@ VI_NON_ALTFMT_INSN VI_VFP_NCVT_INT_TO_FP( - { vd = ui32_to_f16(vs2); }, // BODY32 - { vd = ui64_to_f32(vs2); }, // BODY64 - { require_extension(EXT_ZVFH); }, // CHECK32 - { require_extension('F'); }, // CHECK64 - uint // sign + { vd = ui32_to_f16(vs2); }, // BODY32 + { vd = ui64_to_f32(vs2); }, // BODY64 + { require_extension(EXT_ZVFH); }, // CHECK32 + { require(p->get_isa().get_zvf()); }, // CHECK64 + uint // sign ) diff --git a/riscv/insns/vfncvt_rtz_x_f_w.h b/riscv/insns/vfncvt_rtz_x_f_w.h index 82f82287..ad9ce215 100644 --- a/riscv/insns/vfncvt_rtz_x_f_w.h +++ b/riscv/insns/vfncvt_rtz_x_f_w.h @@ -6,7 +6,7 @@ VI_VFP_NCVT_FP_TO_INT( { vd = f32_to_i16(vs2, softfloat_round_minMag, true); }, // BODY32 { vd = f64_to_i32(vs2, softfloat_round_minMag, true); }, // BODY64 { require_zvfbfa_or_zvfh; }, // CHECK16 - { require(p->extension_enabled('F')); }, // CHECK32 - { require(p->extension_enabled('D')); }, // CHECK64 + { require(p->get_isa().get_zvf()); }, // CHECK32 + { require(p->get_isa().get_zvd()); }, // CHECK64 int // sign ) diff --git a/riscv/insns/vfncvt_rtz_xu_f_w.h b/riscv/insns/vfncvt_rtz_xu_f_w.h index fa0c7a3e..d258aea9 100644 --- a/riscv/insns/vfncvt_rtz_xu_f_w.h +++ b/riscv/insns/vfncvt_rtz_xu_f_w.h @@ -6,7 +6,7 @@ VI_VFP_NCVT_FP_TO_INT( { vd = f32_to_ui16(vs2, softfloat_round_minMag, true); }, // BODY32 { vd = f64_to_ui32(vs2, softfloat_round_minMag, true); }, // BODY64 { require_zvfbfa_or_zvfh; }, // CHECK16 - { require(p->extension_enabled('F')); }, // CHECK32 - { require(p->extension_enabled('D')); }, // CHECK64 + { require(p->get_isa().get_zvf()); }, // CHECK32 + { require(p->get_isa().get_zvd()); }, // CHECK64 uint // sign ) diff --git a/riscv/insns/vfncvt_x_f_w.h b/riscv/insns/vfncvt_x_f_w.h index f08b9e51..929ae628 100644 --- a/riscv/insns/vfncvt_x_f_w.h +++ b/riscv/insns/vfncvt_x_f_w.h @@ -6,7 +6,7 @@ VI_VFP_NCVT_FP_TO_INT( { vd = f32_to_i16(vs2, softfloat_roundingMode, true); }, // BODY32 { vd = f64_to_i32(vs2, softfloat_roundingMode, true); }, // BODY64 { require_zvfbfa_or_zvfh; }, // CHECK16 - { require(p->extension_enabled('F')); }, // CHECK32 - { require(p->extension_enabled('D')); }, // CHECK64 + { require(p->get_isa().get_zvf()); }, // CHECK32 + { require(p->get_isa().get_zvd()); }, // CHECK64 int // sign ) diff --git a/riscv/insns/vfncvt_xu_f_w.h b/riscv/insns/vfncvt_xu_f_w.h index 1d5ff461..c56bb53a 100644 --- a/riscv/insns/vfncvt_xu_f_w.h +++ b/riscv/insns/vfncvt_xu_f_w.h @@ -6,7 +6,7 @@ VI_VFP_NCVT_FP_TO_INT( { vd = f32_to_ui16(vs2, softfloat_roundingMode, true); }, // BODY32 { vd = f64_to_ui32(vs2, softfloat_roundingMode, true); }, // BODY64 { require_zvfbfa_or_zvfh; }, // CHECK16 - { require(p->extension_enabled('F')); }, // CHECK32 - { require(p->extension_enabled('D')); }, // CHECK64 + { require(p->get_isa().get_zvf()); }, // CHECK32 + { require(p->get_isa().get_zvd()); }, // CHECK64 uint // sign ) diff --git a/riscv/insns/vfwcvt_f_x_v.h b/riscv/insns/vfwcvt_f_x_v.h index a30029e1..76a06965 100644 --- a/riscv/insns/vfwcvt_f_x_v.h +++ b/riscv/insns/vfwcvt_f_x_v.h @@ -5,7 +5,7 @@ VI_VFP_WCVT_INT_TO_FP( { vd = i32_to_f32(vs2); }, // BODY16 { vd = i32_to_f64(vs2); }, // BODY32 { require_zvfbfa_or_zvfh; }, // CHECK8 - { require_extension('F'); }, // CHECK16 - { require_extension('D'); }, // CHECK32 + { require(p->get_isa().get_zvf()); }, // CHECK64 + { require(p->get_isa().get_zvd()); }, // CHECK64 int // sign ) diff --git a/riscv/insns/vfwcvt_f_xu_v.h b/riscv/insns/vfwcvt_f_xu_v.h index 4fbbd80d..f3220684 100644 --- a/riscv/insns/vfwcvt_f_xu_v.h +++ b/riscv/insns/vfwcvt_f_xu_v.h @@ -5,7 +5,7 @@ VI_VFP_WCVT_INT_TO_FP( { vd = ui32_to_f32(vs2); }, // BODY16 { vd = ui32_to_f64(vs2); }, // BODY32 { require_zvfbfa_or_zvfh; }, // CHECK8 - { require_extension('F'); }, // CHECK16 - { require_extension('D'); }, // CHECK32 + { require(p->get_isa().get_zvf()); }, // CHECK32 + { require(p->get_isa().get_zvd()); }, // CHECK64 uint // sign ) diff --git a/riscv/insns/vfwcvt_rtz_x_f_v.h b/riscv/insns/vfwcvt_rtz_x_f_v.h index f6d2301c..3ed454b9 100644 --- a/riscv/insns/vfwcvt_rtz_x_f_v.h +++ b/riscv/insns/vfwcvt_rtz_x_f_v.h @@ -5,6 +5,6 @@ VI_VFP_WCVT_FP_TO_INT( { vd = f16_to_i32(vs2, softfloat_round_minMag, true); }, // BODY16 { vd = f32_to_i64(vs2, softfloat_round_minMag, true); }, // BODY32 { require_extension(EXT_ZVFH); }, // CHECK16 - { require_extension('F'); }, // CHECK32 + { require(p->get_isa().get_zvf()); }, // CHECK32 int // sign ) diff --git a/riscv/insns/vfwcvt_rtz_xu_f_v.h b/riscv/insns/vfwcvt_rtz_xu_f_v.h index 8e66ceff..e0c737cb 100644 --- a/riscv/insns/vfwcvt_rtz_xu_f_v.h +++ b/riscv/insns/vfwcvt_rtz_xu_f_v.h @@ -5,6 +5,6 @@ VI_VFP_WCVT_FP_TO_INT( { vd = f16_to_ui32(vs2, softfloat_round_minMag, true); }, // BODY16 { vd = f32_to_ui64(vs2, softfloat_round_minMag, true); }, // BODY32 { require_extension(EXT_ZVFH); }, // CHECK16 - { require_extension('F'); }, // CHECK32 + { require(p->get_isa().get_zvf()); }, // CHECK32 uint // sign ) diff --git a/riscv/insns/vfwcvt_x_f_v.h b/riscv/insns/vfwcvt_x_f_v.h index 49a07b93..b974c86d 100644 --- a/riscv/insns/vfwcvt_x_f_v.h +++ b/riscv/insns/vfwcvt_x_f_v.h @@ -5,6 +5,6 @@ VI_VFP_WCVT_FP_TO_INT( { vd = f16_to_i32(vs2, softfloat_roundingMode, true); }, // BODY16 { vd = f32_to_i64(vs2, softfloat_roundingMode, true); }, // BODY32 { require_extension(EXT_ZVFH); }, // CHECK16 - { require_extension('F'); }, // CHECK32 + { require(p->get_isa().get_zvf()); }, // CHECK32 int // sign ) diff --git a/riscv/insns/vfwcvt_xu_f_v.h b/riscv/insns/vfwcvt_xu_f_v.h index 8b1a07ab..7cf0dab1 100644 --- a/riscv/insns/vfwcvt_xu_f_v.h +++ b/riscv/insns/vfwcvt_xu_f_v.h @@ -5,6 +5,6 @@ VI_VFP_WCVT_FP_TO_INT( { vd = f16_to_ui32(vs2, softfloat_roundingMode, true); }, // BODY16 { vd = f32_to_ui64(vs2, softfloat_roundingMode, true); }, // BODY32 { require_extension(EXT_ZVFH); }, // CHECK16 - { require_extension('F'); }, // CHECK32 + { require(p->get_isa().get_zvf()); }, // CHECK32 uint // sign )