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riscv-isa-sim
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rvp: replace __int128 with int128_t/uint128_t and guard p-ext by HAVE_INT128 

Replace bare __int128 / unsigned __int128 in psshar_dhs.h and psshar_dws.h
with the int128_t / uint128_t typedefs from fesvr/byteorder.h, and guard
the entire riscv_insn_ext_p list in riscv.mk.in with $(if $(HAVE_INT128),...)
matching the existing pattern for the V extension

Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
pull/2246/head
Chih-Min Chao 1 month ago
parent
91a0debd84
commit
f2aa295a31
3 changed files with 30 additions and 30 deletions
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  1. 26
      riscv/insns/psshar_dhs.h
  2. 26
      riscv/insns/psshar_dws.h
  3. 2
      riscv/riscv.mk.in

26
riscv/insns/psshar_dhs.h
View File

@ -12,30 +12,30 @@ P_RD_RS1_DW_LOOP(16, 16, {
if ((rev & 0xFFu) == 0u)
p_rd = (uint16_t)p_rs1;
else{
__int128 v_sext;
int128_t v_sext;
bool neg = ((p_rs1 >> (16 - 1)) & 1u);
if(!neg) v_sext = static_cast<__int128>(p_rs1);
else v_sext = (static_cast<__int128>(-1) << 16) | static_cast<__int128>(p_rs1);
__int128 v_cat0 = v_sext << 1;
if(!neg) v_sext = static_cast<int128_t>(p_rs1);
else v_sext = static_cast<int128_t>((~static_cast<uint128_t>(0) << 16) | static_cast<uint128_t>(p_rs1));
int128_t v_cat0 = v_sext << 1;
unsigned sh = ((unsigned)(uint8_t)rev > 255u) ? 255u : (unsigned)(uint8_t)rev;
__int128 sra_val;
int128_t sra_val;
if(sh == 0)
sra_val = v_cat0;
else if(sh >=127)
sra_val = (v_cat0 < 0) ? static_cast<__int128>(-1) : static_cast<__int128>(0);
sra_val = (v_cat0 < 0) ? static_cast<int128_t>(-1) : static_cast<int128_t>(0);
else{
__int128 ux = static_cast<unsigned __int128>(v_cat0);
__int128 shifted = ux >> sh;
int128_t ux = static_cast<uint128_t>(v_cat0);
int128_t shifted = ux >> sh;
if(v_cat0 < 0)
shifted |= (~static_cast<unsigned __int128>(0)) << (128 - sh);
sra_val = static_cast<__int128>(shifted);
shifted |= (~static_cast<uint128_t>(0)) << (128 - sh);
sra_val = static_cast<int128_t>(shifted);
}
__int128 plus1 = sra_val + static_cast<__int128>(1);
unsigned __int128 ures = static_cast<unsigned __int128>(plus1);
p_rd = (uint16_t)(static_cast<uint64_t>((ures >> 1) & static_cast<unsigned __int128>(mask)));
int128_t plus1 = sra_val + static_cast<int128_t>(1);
uint128_t ures = static_cast<uint128_t>(plus1);
p_rd = (uint16_t)(static_cast<uint64_t>((ures >> 1) & static_cast<uint128_t>(mask)));
}
}
else{

26
riscv/insns/psshar_dws.h
View File

@ -12,30 +12,30 @@ P_RD_RS1_DW_LOOP(32, 32, {
if ((rev & 0xFFu) == 0u)
p_rd = (uint32_t)p_rs1;
else{
__int128 v_sext;
int128_t v_sext;
bool neg = ((p_rs1 >> (32 - 1)) & 1u);
if(!neg) v_sext = static_cast<__int128>(p_rs1);
else v_sext = (static_cast<__int128>(-1) << 32) | static_cast<__int128>(p_rs1);
__int128 v_cat0 = v_sext << 1;
if(!neg) v_sext = static_cast<int128_t>(p_rs1);
else v_sext = static_cast<int128_t>((~static_cast<uint128_t>(0) << 32) | static_cast<uint128_t>(p_rs1));
int128_t v_cat0 = v_sext << 1;
unsigned sh = ((unsigned)(uint8_t)rev > 255u) ? 255u : (unsigned)(uint8_t)rev;
__int128 sra_val;
int128_t sra_val;
if(sh == 0)
sra_val = v_cat0;
else if(sh >=127)
sra_val = (v_cat0 < 0) ? static_cast<__int128>(-1) : static_cast<__int128>(0);
sra_val = (v_cat0 < 0) ? static_cast<int128_t>(-1) : static_cast<int128_t>(0);
else{
__int128 ux = static_cast<unsigned __int128>(v_cat0);
__int128 shifted = ux >> sh;
int128_t ux = static_cast<uint128_t>(v_cat0);
int128_t shifted = ux >> sh;
if(v_cat0 < 0)
shifted |= (~static_cast<unsigned __int128>(0)) << (128 - sh);
sra_val = static_cast<__int128>(shifted);
shifted |= (~static_cast<uint128_t>(0)) << (128 - sh);
sra_val = static_cast<int128_t>(shifted);
}
__int128 plus1 = sra_val + static_cast<__int128>(1);
unsigned __int128 ures = static_cast<unsigned __int128>(plus1);
p_rd = (uint32_t)(static_cast<uint64_t>((ures >> 1) & static_cast<unsigned __int128>(mask)));
int128_t plus1 = sra_val + static_cast<int128_t>(1);
uint128_t ures = static_cast<uint128_t>(plus1);
p_rd = (uint32_t)(static_cast<uint64_t>((ures >> 1) & static_cast<uint128_t>(mask)));
}
}
else{

2
riscv/riscv.mk.in
View File

@ -1775,7 +1775,7 @@ riscv_insn_list = \
$(riscv_insn_ext_cmo) \
$(riscv_insn_ext_d_zfa) \
$(riscv_insn_ext_f_zfa) \
$(riscv_insn_ext_p) \
$(if $(HAVE_INT128),$(riscv_insn_ext_p)) \
$(riscv_insn_ext_h) \
$(riscv_insn_ext_k) \
$(if $(HAVE_INT128),$(riscv_insn_ext_q),) \

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