Merge pull request #565 from chihminchao/rvv-fix-2020-10-06

Rvv fix 2020 10 06

riscv/decode.h

@@ -1831,6 +1831,7 @@ for (reg_t i = 0; i < P.VU.vlmax && P.VU.vl != 0; ++i) { \
   for (reg_t i = P.VU.vstart; i < vl; ++i) { \
     VI_ELEMENT_SKIP(i); \
     VI_STRIP(i); \
+    P.VU.vstart = i; \
     switch (P.VU.vsew) { \
     case e32: {\
       auto vs3 = P.VU.elt< type ## 32_t>(vd, vreg_inx); \

riscv/execute.cc

@@ -76,8 +76,7 @@ static void commit_log_print_insn(processor_t *p, reg_t pc, insn_t insn)
   int flen = p->get_state()->last_inst_flen;
 
   // print core id on all lines so it is easy to grep
-  uint64_t id = p->get_csr(CSR_MHARTID);
-  fprintf(log_file, "core%4" PRId64 ": ", id);
+  fprintf(log_file, "core%4" PRId64 ": ", p->get_id());
 
   fprintf(log_file, "%1d ", priv);
   commit_log_print_value(log_file, xlen, pc);

riscv/processor.cc

@@ -152,8 +152,6 @@ void processor_t::parse_varch_string(const char* s)
   /* Vector spec requirements. */
   if (vlen < elen)
     bad_varch_string(s, "vlen must be >= elen");
-  if ((unsigned) elen < std::max(max_xlen, get_flen()))
-    bad_varch_string(s, "elen must be >= max(xlen, flen)");
   if (vlen != slen)
     bad_varch_string(s, "vlen must be == slen for current limitation");
 

riscv/processor.h

@@ -272,6 +272,7 @@ public:
   void reset();
   void step(size_t n); // run for n cycles
   void set_csr(int which, reg_t val);
+  uint32_t get_id() const { return id; }
   reg_t get_csr(int which, insn_t insn, bool write, bool peek = 0);
   reg_t get_csr(int which) { return get_csr(which, insn_t(0), false, true); }
   mmu_t* get_mmu() { return mmu; }