diff --git a/riscv/csrs.cc b/riscv/csrs.cc
index 914662a1..06e89d4d 100644
--- a/riscv/csrs.cc
+++ b/riscv/csrs.cc
@@ -1854,17 +1854,15 @@ void sscsrind_reg_csr_t::verify_permissions(insn_t insn, bool write) const {
   if (proc->extension_enabled(EXT_SMSTATEEN)) {
     if ((state->prv < PRV_M) && !(state->mstateen[0]->read() & MSTATEEN0_CSRIND))
       throw trap_illegal_instruction(insn.bits());
+
+    if (state->v && !(state->hstateen[0]->read() & HSTATEEN0_CSRIND))
+      throw trap_virtual_instruction(insn.bits());
   }
 
   // Don't call base verify_permission for VS registers remapped to S-mode
   if (insn.csr() == address)
     csr_t::verify_permissions(insn, write);
 
-  if (proc->extension_enabled(EXT_SMSTATEEN)) {
-    if (state->v && !(state->hstateen[0]->read() & HSTATEEN0_CSRIND))
-      throw trap_virtual_instruction(insn.bits());
-  }
-
   if (proc->extension_enabled(EXT_SMCDELEG)) {
     if (address >= CSR_VSIREG && address <= CSR_VSIREG6) {
       if (!state->v) {