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Merge pull request #580 from riscv/riscv-bitmanip

Incorporate draft B extension
pull/582/head
Andrew Waterman 6 years ago
committed by GitHub
parent
commit
ec6ded4f2f
No known key found for this signature in database GPG Key ID: 4AEE18F83AFDEB23
  1. 13
      disasm/disasm.cc
  2. 318
      riscv/encoding.h
  3. 3
      riscv/insns/addiwu.h
  4. 3
      riscv/insns/addu_w.h
  5. 3
      riscv/insns/addwu.h
  6. 2
      riscv/insns/andn.h
  7. 9
      riscv/insns/bdep.h
  8. 10
      riscv/insns/bdepw.h
  9. 9
      riscv/insns/bext.h
  10. 10
      riscv/insns/bextw.h
  11. 10
      riscv/insns/bfp.h
  12. 8
      riscv/insns/bfpw.h
  13. 11
      riscv/insns/bmatflip.h
  14. 29
      riscv/insns/bmator.h
  15. 29
      riscv/insns/bmatxor.h
  16. 6
      riscv/insns/clmul.h
  17. 6
      riscv/insns/clmulh.h
  18. 6
      riscv/insns/clmulhw.h
  19. 6
      riscv/insns/clmulr.h
  20. 6
      riscv/insns/clmulrw.h
  21. 6
      riscv/insns/clmulw.h
  22. 5
      riscv/insns/clz.h
  23. 6
      riscv/insns/clzw.h
  24. 2
      riscv/insns/cmix.h
  25. 2
      riscv/insns/cmov.h
  26. 5
      riscv/insns/crc32_b.h
  27. 5
      riscv/insns/crc32_d.h
  28. 5
      riscv/insns/crc32_h.h
  29. 5
      riscv/insns/crc32_w.h
  30. 5
      riscv/insns/crc32c_b.h
  31. 5
      riscv/insns/crc32c_d.h
  32. 5
      riscv/insns/crc32c_h.h
  33. 5
      riscv/insns/crc32c_w.h
  34. 5
      riscv/insns/ctz.h
  35. 6
      riscv/insns/ctzw.h
  36. 9
      riscv/insns/fsl.h
  37. 10
      riscv/insns/fslw.h
  38. 9
      riscv/insns/fsr.h
  39. 9
      riscv/insns/fsri.h
  40. 10
      riscv/insns/fsriw.h
  41. 10
      riscv/insns/fsrw.h
  42. 10
      riscv/insns/gorc.h
  43. 11
      riscv/insns/gorci.h
  44. 11
      riscv/insns/gorciw.h
  45. 10
      riscv/insns/gorcw.h
  46. 10
      riscv/insns/grev.h
  47. 11
      riscv/insns/grevi.h
  48. 11
      riscv/insns/greviw.h
  49. 10
      riscv/insns/grevw.h
  50. 2
      riscv/insns/max.h
  51. 2
      riscv/insns/maxu.h
  52. 2
      riscv/insns/min.h
  53. 2
      riscv/insns/minu.h
  54. 2
      riscv/insns/orn.h
  55. 4
      riscv/insns/pack.h
  56. 4
      riscv/insns/packh.h
  57. 4
      riscv/insns/packu.h
  58. 4
      riscv/insns/packuw.h
  59. 4
      riscv/insns/packw.h
  60. 5
      riscv/insns/pcnt.h
  61. 6
      riscv/insns/pcntw.h
  62. 4
      riscv/insns/rol.h
  63. 5
      riscv/insns/rolw.h
  64. 4
      riscv/insns/ror.h
  65. 5
      riscv/insns/rori.h
  66. 5
      riscv/insns/roriw.h
  67. 5
      riscv/insns/rorw.h
  68. 3
      riscv/insns/sbclr.h
  69. 3
      riscv/insns/sbclri.h
  70. 3
      riscv/insns/sbclriw.h
  71. 3
      riscv/insns/sbclrw.h
  72. 3
      riscv/insns/sbext.h
  73. 3
      riscv/insns/sbexti.h
  74. 3
      riscv/insns/sbextw.h
  75. 3
      riscv/insns/sbinv.h
  76. 3
      riscv/insns/sbinvi.h
  77. 3
      riscv/insns/sbinviw.h
  78. 3
      riscv/insns/sbinvw.h
  79. 3
      riscv/insns/sbset.h
  80. 3
      riscv/insns/sbseti.h
  81. 3
      riscv/insns/sbsetiw.h
  82. 3
      riscv/insns/sbsetw.h
  83. 2
      riscv/insns/sext_b.h
  84. 2
      riscv/insns/sext_h.h
  85. 2
      riscv/insns/sh1add.h
  86. 3
      riscv/insns/sh1addu_w.h
  87. 2
      riscv/insns/sh2add.h
  88. 3
      riscv/insns/sh2addu_w.h
  89. 2
      riscv/insns/sh3add.h
  90. 3
      riscv/insns/sh3addu_w.h
  91. 9
      riscv/insns/shfl.h
  92. 10
      riscv/insns/shfli.h
  93. 9
      riscv/insns/shflw.h
  94. 3
      riscv/insns/slliu_w.h
  95. 2
      riscv/insns/slo.h
  96. 3
      riscv/insns/sloi.h
  97. 3
      riscv/insns/sloiw.h
  98. 3
      riscv/insns/slow.h
  99. 2
      riscv/insns/sro.h
  100. 3
      riscv/insns/sroi.h

13
disasm/disasm.cc

@ -542,6 +542,19 @@ disassembler_t::disassembler_t(int xlen)
DEFINE_RTYPE(remw);
DEFINE_RTYPE(remuw);
DEFINE_RTYPE(sh1add);
DEFINE_RTYPE(sh2add);
DEFINE_RTYPE(sh3add);
DEFINE_RTYPE(sh1addu_w);
DEFINE_RTYPE(sh2addu_w);
DEFINE_RTYPE(sh3addu_w);
DEFINE_RTYPE(addwu);
DEFINE_RTYPE(subwu);
DEFINE_ITYPE(addiwu);
DEFINE_RTYPE(ror);
DEFINE_RTYPE(rol);
DEFINE_ITYPE_SHIFT(rori);
DEFINE_NOARG(ecall);
DEFINE_NOARG(ebreak);
DEFINE_NOARG(uret);

318
riscv/encoding.h

@ -448,6 +448,218 @@
#define MASK_REMW 0xfe00707f
#define MATCH_REMUW 0x200703b
#define MASK_REMUW 0xfe00707f
#define MATCH_ANDN 0x40007033
#define MASK_ANDN 0xfe00707f
#define MATCH_ORN 0x40006033
#define MASK_ORN 0xfe00707f
#define MATCH_XNOR 0x40004033
#define MASK_XNOR 0xfe00707f
#define MATCH_SLO 0x20001033
#define MASK_SLO 0xfe00707f
#define MATCH_SRO 0x20005033
#define MASK_SRO 0xfe00707f
#define MATCH_ROL 0x60001033
#define MASK_ROL 0xfe00707f
#define MATCH_ROR 0x60005033
#define MASK_ROR 0xfe00707f
#define MATCH_SBCLR 0x48001033
#define MASK_SBCLR 0xfe00707f
#define MATCH_SBSET 0x28001033
#define MASK_SBSET 0xfe00707f
#define MATCH_SBINV 0x68001033
#define MASK_SBINV 0xfe00707f
#define MATCH_SBEXT 0x48005033
#define MASK_SBEXT 0xfe00707f
#define MATCH_GORC 0x28005033
#define MASK_GORC 0xfe00707f
#define MATCH_GREV 0x68005033
#define MASK_GREV 0xfe00707f
#define MATCH_SLOI 0x20001013
#define MASK_SLOI 0xfc00707f
#define MATCH_SROI 0x20005013
#define MASK_SROI 0xfc00707f
#define MATCH_RORI 0x60005013
#define MASK_RORI 0xfc00707f
#define MATCH_SBCLRI 0x48001013
#define MASK_SBCLRI 0xfc00707f
#define MATCH_SBSETI 0x28001013
#define MASK_SBSETI 0xfc00707f
#define MATCH_SBINVI 0x68001013
#define MASK_SBINVI 0xfc00707f
#define MATCH_SBEXTI 0x48005013
#define MASK_SBEXTI 0xfc00707f
#define MATCH_GORCI 0x28005013
#define MASK_GORCI 0xfc00707f
#define MATCH_GREVI 0x68005013
#define MASK_GREVI 0xfc00707f
#define MATCH_CMIX 0x6001033
#define MASK_CMIX 0x600707f
#define MATCH_CMOV 0x6005033
#define MASK_CMOV 0x600707f
#define MATCH_FSL 0x4001033
#define MASK_FSL 0x600707f
#define MATCH_FSR 0x4005033
#define MASK_FSR 0x600707f
#define MATCH_FSRI 0x4005013
#define MASK_FSRI 0x400707f
#define MATCH_CLZ 0x60001013
#define MASK_CLZ 0xfff0707f
#define MATCH_CTZ 0x60101013
#define MASK_CTZ 0xfff0707f
#define MATCH_PCNT 0x60201013
#define MASK_PCNT 0xfff0707f
#define MATCH_SEXT_B 0x60401013
#define MASK_SEXT_B 0xfff0707f
#define MATCH_SEXT_H 0x60501013
#define MASK_SEXT_H 0xfff0707f
#define MATCH_CRC32_B 0x61001013
#define MASK_CRC32_B 0xfff0707f
#define MATCH_CRC32_H 0x61101013
#define MASK_CRC32_H 0xfff0707f
#define MATCH_CRC32_W 0x61201013
#define MASK_CRC32_W 0xfff0707f
#define MATCH_CRC32C_B 0x61801013
#define MASK_CRC32C_B 0xfff0707f
#define MATCH_CRC32C_H 0x61901013
#define MASK_CRC32C_H 0xfff0707f
#define MATCH_CRC32C_W 0x61a01013
#define MASK_CRC32C_W 0xfff0707f
#define MATCH_SH1ADD 0x20002033
#define MASK_SH1ADD 0xfe00707f
#define MATCH_SH2ADD 0x20004033
#define MASK_SH2ADD 0xfe00707f
#define MATCH_SH3ADD 0x20006033
#define MASK_SH3ADD 0xfe00707f
#define MATCH_CLMUL 0xa001033
#define MASK_CLMUL 0xfe00707f
#define MATCH_CLMULR 0xa002033
#define MASK_CLMULR 0xfe00707f
#define MATCH_CLMULH 0xa003033
#define MASK_CLMULH 0xfe00707f
#define MATCH_MIN 0xa004033
#define MASK_MIN 0xfe00707f
#define MATCH_MINU 0xa005033
#define MASK_MINU 0xfe00707f
#define MATCH_MAX 0xa006033
#define MASK_MAX 0xfe00707f
#define MATCH_MAXU 0xa007033
#define MASK_MAXU 0xfe00707f
#define MATCH_SHFL 0x8001033
#define MASK_SHFL 0xfe00707f
#define MATCH_UNSHFL 0x8005033
#define MASK_UNSHFL 0xfe00707f
#define MATCH_BEXT 0x8006033
#define MASK_BEXT 0xfe00707f
#define MATCH_BDEP 0x48006033
#define MASK_BDEP 0xfe00707f
#define MATCH_PACK 0x8004033
#define MASK_PACK 0xfe00707f
#define MATCH_PACKU 0x48004033
#define MASK_PACKU 0xfe00707f
#define MATCH_PACKH 0x8007033
#define MASK_PACKH 0xfe00707f
#define MATCH_BFP 0x48007033
#define MASK_BFP 0xfe00707f
#define MATCH_SHFLI 0x8001013
#define MASK_SHFLI 0xfe00707f
#define MATCH_UNSHFLI 0x8005013
#define MASK_UNSHFLI 0xfe00707f
#define MATCH_BMATFLIP 0x60301013
#define MASK_BMATFLIP 0xfff0707f
#define MATCH_CRC32_D 0x61301013
#define MASK_CRC32_D 0xfff0707f
#define MATCH_CRC32C_D 0x61b01013
#define MASK_CRC32C_D 0xfff0707f
#define MATCH_BMATOR 0x8003033
#define MASK_BMATOR 0xfe00707f
#define MATCH_BMATXOR 0x48003033
#define MASK_BMATXOR 0xfe00707f
#define MATCH_ADDIWU 0x401b
#define MASK_ADDIWU 0x707f
#define MATCH_SLLIU_W 0x800101b
#define MASK_SLLIU_W 0xfc00707f
#define MATCH_ADDWU 0xa00003b
#define MASK_ADDWU 0xfe00707f
#define MATCH_SUBWU 0x4a00003b
#define MASK_SUBWU 0xfe00707f
#define MATCH_ADDU_W 0x800003b
#define MASK_ADDU_W 0xfe00707f
#define MATCH_SUBU_W 0x4800003b
#define MASK_SUBU_W 0xfe00707f
#define MATCH_SLOW 0x2000103b
#define MASK_SLOW 0xfe00707f
#define MATCH_SROW 0x2000503b
#define MASK_SROW 0xfe00707f
#define MATCH_ROLW 0x6000103b
#define MASK_ROLW 0xfe00707f
#define MATCH_RORW 0x6000503b
#define MASK_RORW 0xfe00707f
#define MATCH_SBCLRW 0x4800103b
#define MASK_SBCLRW 0xfe00707f
#define MATCH_SBSETW 0x2800103b
#define MASK_SBSETW 0xfe00707f
#define MATCH_SBINVW 0x6800103b
#define MASK_SBINVW 0xfe00707f
#define MATCH_SBEXTW 0x4800503b
#define MASK_SBEXTW 0xfe00707f
#define MATCH_GORCW 0x2800503b
#define MASK_GORCW 0xfe00707f
#define MATCH_GREVW 0x6800503b
#define MASK_GREVW 0xfe00707f
#define MATCH_SLOIW 0x2000101b
#define MASK_SLOIW 0xfe00707f
#define MATCH_SROIW 0x2000501b
#define MASK_SROIW 0xfe00707f
#define MATCH_RORIW 0x6000501b
#define MASK_RORIW 0xfe00707f
#define MATCH_SBCLRIW 0x4800101b
#define MASK_SBCLRIW 0xfe00707f
#define MATCH_SBSETIW 0x2800101b
#define MASK_SBSETIW 0xfe00707f
#define MATCH_SBINVIW 0x6800101b
#define MASK_SBINVIW 0xfe00707f
#define MATCH_GORCIW 0x2800501b
#define MASK_GORCIW 0xfe00707f
#define MATCH_GREVIW 0x6800501b
#define MASK_GREVIW 0xfe00707f
#define MATCH_FSLW 0x400103b
#define MASK_FSLW 0x600707f
#define MATCH_FSRW 0x400503b
#define MASK_FSRW 0x600707f
#define MATCH_FSRIW 0x400501b
#define MASK_FSRIW 0x600707f
#define MATCH_CLZW 0x6000101b
#define MASK_CLZW 0xfff0707f
#define MATCH_CTZW 0x6010101b
#define MASK_CTZW 0xfff0707f
#define MATCH_PCNTW 0x6020101b
#define MASK_PCNTW 0xfff0707f
#define MATCH_SH1ADDU_W 0x2000203b
#define MASK_SH1ADDU_W 0xfe00707f
#define MATCH_SH2ADDU_W 0x2000403b
#define MASK_SH2ADDU_W 0xfe00707f
#define MATCH_SH3ADDU_W 0x2000603b
#define MASK_SH3ADDU_W 0xfe00707f
#define MATCH_CLMULW 0xa00103b
#define MASK_CLMULW 0xfe00707f
#define MATCH_CLMULRW 0xa00203b
#define MASK_CLMULRW 0xfe00707f
#define MATCH_CLMULHW 0xa00303b
#define MASK_CLMULHW 0xfe00707f
#define MATCH_SHFLW 0x800103b
#define MASK_SHFLW 0xfe00707f
#define MATCH_UNSHFLW 0x800503b
#define MASK_UNSHFLW 0xfe00707f
#define MATCH_BEXTW 0x800603b
#define MASK_BEXTW 0xfe00707f
#define MATCH_BDEPW 0x4800603b
#define MASK_BDEPW 0xfe00707f
#define MATCH_PACKW 0x800403b
#define MASK_PACKW 0xfe00707f
#define MATCH_PACKUW 0x4800403b
#define MASK_PACKUW 0xfe00707f
#define MATCH_BFPW 0x4800703b
#define MASK_BFPW 0xfe00707f
#define MATCH_AMOADD_W 0x202f
#define MASK_AMOADD_W 0xf800707f
#define MATCH_AMOXOR_W 0x2000202f
@ -2223,6 +2435,112 @@ DECLARE_INSN(divw, MATCH_DIVW, MASK_DIVW)
DECLARE_INSN(divuw, MATCH_DIVUW, MASK_DIVUW)
DECLARE_INSN(remw, MATCH_REMW, MASK_REMW)
DECLARE_INSN(remuw, MATCH_REMUW, MASK_REMUW)
DECLARE_INSN(andn, MATCH_ANDN, MASK_ANDN)
DECLARE_INSN(orn, MATCH_ORN, MASK_ORN)
DECLARE_INSN(xnor, MATCH_XNOR, MASK_XNOR)
DECLARE_INSN(slo, MATCH_SLO, MASK_SLO)
DECLARE_INSN(sro, MATCH_SRO, MASK_SRO)
DECLARE_INSN(rol, MATCH_ROL, MASK_ROL)
DECLARE_INSN(ror, MATCH_ROR, MASK_ROR)
DECLARE_INSN(sbclr, MATCH_SBCLR, MASK_SBCLR)
DECLARE_INSN(sbset, MATCH_SBSET, MASK_SBSET)
DECLARE_INSN(sbinv, MATCH_SBINV, MASK_SBINV)
DECLARE_INSN(sbext, MATCH_SBEXT, MASK_SBEXT)
DECLARE_INSN(gorc, MATCH_GORC, MASK_GORC)
DECLARE_INSN(grev, MATCH_GREV, MASK_GREV)
DECLARE_INSN(sloi, MATCH_SLOI, MASK_SLOI)
DECLARE_INSN(sroi, MATCH_SROI, MASK_SROI)
DECLARE_INSN(rori, MATCH_RORI, MASK_RORI)
DECLARE_INSN(sbclri, MATCH_SBCLRI, MASK_SBCLRI)
DECLARE_INSN(sbseti, MATCH_SBSETI, MASK_SBSETI)
DECLARE_INSN(sbinvi, MATCH_SBINVI, MASK_SBINVI)
DECLARE_INSN(sbexti, MATCH_SBEXTI, MASK_SBEXTI)
DECLARE_INSN(gorci, MATCH_GORCI, MASK_GORCI)
DECLARE_INSN(grevi, MATCH_GREVI, MASK_GREVI)
DECLARE_INSN(cmix, MATCH_CMIX, MASK_CMIX)
DECLARE_INSN(cmov, MATCH_CMOV, MASK_CMOV)
DECLARE_INSN(fsl, MATCH_FSL, MASK_FSL)
DECLARE_INSN(fsr, MATCH_FSR, MASK_FSR)
DECLARE_INSN(fsri, MATCH_FSRI, MASK_FSRI)
DECLARE_INSN(clz, MATCH_CLZ, MASK_CLZ)
DECLARE_INSN(ctz, MATCH_CTZ, MASK_CTZ)
DECLARE_INSN(pcnt, MATCH_PCNT, MASK_PCNT)
DECLARE_INSN(sext_b, MATCH_SEXT_B, MASK_SEXT_B)
DECLARE_INSN(sext_h, MATCH_SEXT_H, MASK_SEXT_H)
DECLARE_INSN(crc32_b, MATCH_CRC32_B, MASK_CRC32_B)
DECLARE_INSN(crc32_h, MATCH_CRC32_H, MASK_CRC32_H)
DECLARE_INSN(crc32_w, MATCH_CRC32_W, MASK_CRC32_W)
DECLARE_INSN(crc32c_b, MATCH_CRC32C_B, MASK_CRC32C_B)
DECLARE_INSN(crc32c_h, MATCH_CRC32C_H, MASK_CRC32C_H)
DECLARE_INSN(crc32c_w, MATCH_CRC32C_W, MASK_CRC32C_W)
DECLARE_INSN(sh1add, MATCH_SH1ADD, MASK_SH1ADD)
DECLARE_INSN(sh2add, MATCH_SH2ADD, MASK_SH2ADD)
DECLARE_INSN(sh3add, MATCH_SH3ADD, MASK_SH3ADD)
DECLARE_INSN(clmul, MATCH_CLMUL, MASK_CLMUL)
DECLARE_INSN(clmulr, MATCH_CLMULR, MASK_CLMULR)
DECLARE_INSN(clmulh, MATCH_CLMULH, MASK_CLMULH)
DECLARE_INSN(min, MATCH_MIN, MASK_MIN)
DECLARE_INSN(max, MATCH_MAX, MASK_MAX)
DECLARE_INSN(minu, MATCH_MINU, MASK_MINU)
DECLARE_INSN(maxu, MATCH_MAXU, MASK_MAXU)
DECLARE_INSN(shfl, MATCH_SHFL, MASK_SHFL)
DECLARE_INSN(unshfl, MATCH_UNSHFL, MASK_UNSHFL)
DECLARE_INSN(bext, MATCH_BEXT, MASK_BEXT)
DECLARE_INSN(bdep, MATCH_BDEP, MASK_BDEP)
DECLARE_INSN(pack, MATCH_PACK, MASK_PACK)
DECLARE_INSN(packu, MATCH_PACKU, MASK_PACKU)
DECLARE_INSN(packh, MATCH_PACKH, MASK_PACKH)
DECLARE_INSN(bfp, MATCH_BFP, MASK_BFP)
DECLARE_INSN(shfli, MATCH_SHFLI, MASK_SHFLI)
DECLARE_INSN(unshfli, MATCH_UNSHFLI, MASK_UNSHFLI)
DECLARE_INSN(bmatflip, MATCH_BMATFLIP, MASK_BMATFLIP)
DECLARE_INSN(crc32_d, MATCH_CRC32_D, MASK_CRC32_D)
DECLARE_INSN(crc32c_d, MATCH_CRC32C_D, MASK_CRC32C_D)
DECLARE_INSN(bmator, MATCH_BMATOR, MASK_BMATOR)
DECLARE_INSN(bmatxor, MATCH_BMATXOR, MASK_BMATXOR)
DECLARE_INSN(addiwu, MATCH_ADDIWU, MASK_ADDIWU)
DECLARE_INSN(slliu_w, MATCH_SLLIU_W, MASK_SLLIU_W)
DECLARE_INSN(addwu, MATCH_ADDWU, MASK_ADDWU)
DECLARE_INSN(subwu, MATCH_SUBWU, MASK_SUBWU)
DECLARE_INSN(addu_w, MATCH_ADDU_W, MASK_ADDU_W)
DECLARE_INSN(subu_w, MATCH_SUBU_W, MASK_SUBU_W)
DECLARE_INSN(slow, MATCH_SLOW, MASK_SLOW)
DECLARE_INSN(srow, MATCH_SROW, MASK_SROW)
DECLARE_INSN(rolw, MATCH_ROLW, MASK_ROLW)
DECLARE_INSN(rorw, MATCH_RORW, MASK_RORW)
DECLARE_INSN(sbclrw, MATCH_SBCLRW, MASK_SBCLRW)
DECLARE_INSN(sbsetw, MATCH_SBSETW, MASK_SBSETW)
DECLARE_INSN(sbinvw, MATCH_SBINVW, MASK_SBINVW)
DECLARE_INSN(sbextw, MATCH_SBEXTW, MASK_SBEXTW)
DECLARE_INSN(gorcw, MATCH_GORCW, MASK_GORCW)
DECLARE_INSN(grevw, MATCH_GREVW, MASK_GREVW)
DECLARE_INSN(sloiw, MATCH_SLOIW, MASK_SLOIW)
DECLARE_INSN(sroiw, MATCH_SROIW, MASK_SROIW)
DECLARE_INSN(roriw, MATCH_RORIW, MASK_RORIW)
DECLARE_INSN(sbclriw, MATCH_SBCLRIW, MASK_SBCLRIW)
DECLARE_INSN(sbsetiw, MATCH_SBSETIW, MASK_SBSETIW)
DECLARE_INSN(sbinviw, MATCH_SBINVIW, MASK_SBINVIW)
DECLARE_INSN(gorciw, MATCH_GORCIW, MASK_GORCIW)
DECLARE_INSN(greviw, MATCH_GREVIW, MASK_GREVIW)
DECLARE_INSN(fslw, MATCH_FSLW, MASK_FSLW)
DECLARE_INSN(fsrw, MATCH_FSRW, MASK_FSRW)
DECLARE_INSN(fsriw, MATCH_FSRIW, MASK_FSRIW)
DECLARE_INSN(clzw, MATCH_CLZW, MASK_CLZW)
DECLARE_INSN(ctzw, MATCH_CTZW, MASK_CTZW)
DECLARE_INSN(pcntw, MATCH_PCNTW, MASK_PCNTW)
DECLARE_INSN(sh1addu_w, MATCH_SH1ADDU_W, MASK_SH1ADDU_W)
DECLARE_INSN(sh2addu_w, MATCH_SH2ADDU_W, MASK_SH2ADDU_W)
DECLARE_INSN(sh3addu_w, MATCH_SH3ADDU_W, MASK_SH3ADDU_W)
DECLARE_INSN(clmulw, MATCH_CLMULW, MASK_CLMULW)
DECLARE_INSN(clmulrw, MATCH_CLMULRW, MASK_CLMULRW)
DECLARE_INSN(clmulhw, MATCH_CLMULHW, MASK_CLMULHW)
DECLARE_INSN(shflw, MATCH_SHFLW, MASK_SHFLW)
DECLARE_INSN(unshflw, MATCH_UNSHFLW, MASK_UNSHFLW)
DECLARE_INSN(bextw, MATCH_BEXTW, MASK_BEXTW)
DECLARE_INSN(bdepw, MATCH_BDEPW, MASK_BDEPW)
DECLARE_INSN(packw, MATCH_PACKW, MASK_PACKW)
DECLARE_INSN(packuw, MATCH_PACKUW, MASK_PACKUW)
DECLARE_INSN(bfpw, MATCH_BFPW, MASK_BFPW)
DECLARE_INSN(amoadd_w, MATCH_AMOADD_W, MASK_AMOADD_W)
DECLARE_INSN(amoxor_w, MATCH_AMOXOR_W, MASK_AMOXOR_W)
DECLARE_INSN(amoor_w, MATCH_AMOOR_W, MASK_AMOOR_W)

3
riscv/insns/addiwu.h

@ -0,0 +1,3 @@
require_rv64;
require_extension('B');
WRITE_RD(zext32(insn.i_imm() + RS1));

3
riscv/insns/addu_w.h

@ -0,0 +1,3 @@
require_rv64;
require_extension('B');
WRITE_RD(sext_xlen(zext32(RS1) + RS2));

3
riscv/insns/addwu.h

@ -0,0 +1,3 @@
require_rv64;
require_extension('B');
WRITE_RD(zext32(RS1 + RS2));

2
riscv/insns/andn.h

@ -0,0 +1,2 @@
require_extension('B');
WRITE_RD(RS1 & ~RS2);

9
riscv/insns/bdep.h

@ -0,0 +1,9 @@
require_extension('B');
uint64_t c = 0, i = 0, data = zext_xlen(RS1), mask = zext_xlen(RS2);
while (mask) {
uint64_t b = mask & ~((mask | (mask-1)) + 1);
c |= (data << (__builtin_ctzl(b) - i)) & b;
i += __builtin_popcountl(b);
mask -= b;
}
WRITE_RD(sext_xlen(c));

10
riscv/insns/bdepw.h

@ -0,0 +1,10 @@
require_rv64;
require_extension('B');
uint64_t c = 0, i = 0, data = zext32(RS1), mask = zext32(RS2);
while (mask) {
uint64_t b = mask & ~((mask | (mask-1)) + 1);
c |= (data << (__builtin_ctzl(b) - i)) & b;
i += __builtin_popcountl(b);
mask -= b;
}
WRITE_RD(sext32(c));

9
riscv/insns/bext.h

@ -0,0 +1,9 @@
require_extension('B');
uint64_t c = 0, i = 0, data = zext_xlen(RS1), mask = zext_xlen(RS2);
while (mask) {
uint64_t b = mask & ~((mask | (mask-1)) + 1);
c |= (data & b) >> (__builtin_ctzl(b) - i);
i += __builtin_popcountl(b);
mask -= b;
}
WRITE_RD(sext_xlen(c));

10
riscv/insns/bextw.h

@ -0,0 +1,10 @@
require_rv64;
require_extension('B');
uint64_t c = 0, i = 0, data = zext32(RS1), mask = zext32(RS2);
while (mask) {
uint64_t b = mask & ~((mask | (mask-1)) + 1);
c |= (data & b) >> (__builtin_ctzl(b) - i);
i += __builtin_popcountl(b);
mask -= b;
}
WRITE_RD(sext32(c));

10
riscv/insns/bfp.h

@ -0,0 +1,10 @@
require_extension('B');
reg_t cfg = RS2 >> (xlen/2);
if ((cfg >> 30) == 2)
cfg = cfg >> 16;
int len = (cfg >> 8) & (xlen/2-1);
int off = cfg & (xlen-1);
len = len ? len : xlen/2;
reg_t mask = ~(~reg_t(0) << len) << off;
reg_t data = RS2 << off;
WRITE_RD(sext_xlen((data & mask) | (RS1 & ~mask)));

8
riscv/insns/bfpw.h

@ -0,0 +1,8 @@
require_extension('B');
reg_t cfg = RS2 >> 16;
int len = (cfg >> 8) & 15;
int off = cfg & 31;
len = len ? len : 16;
reg_t mask = ~(~reg_t(0) << len) << off;
reg_t data = RS2 << off;
WRITE_RD(sext32((data & mask) | (RS1 & ~mask)));

11
riscv/insns/bmatflip.h

@ -0,0 +1,11 @@
require_rv64;
require_extension('B');
reg_t x = RS1;
for (int i = 0; i < 3; i++) {
x = (x & 0xFFFF00000000FFFFLL) | ((x & 0x0000FFFF00000000LL) >> 16) | ((x & 0x00000000FFFF0000LL) << 16);
x = (x & 0xFF0000FFFF0000FFLL) | ((x & 0x00FF000000FF0000LL) >> 8) | ((x & 0x0000FF000000FF00LL) << 8);
x = (x & 0xF00FF00FF00FF00FLL) | ((x & 0x0F000F000F000F00LL) >> 4) | ((x & 0x00F000F000F000F0LL) << 4);
x = (x & 0xC3C3C3C3C3C3C3C3LL) | ((x & 0x3030303030303030LL) >> 2) | ((x & 0x0C0C0C0C0C0C0C0CLL) << 2);
x = (x & 0x9999999999999999LL) | ((x & 0x4444444444444444LL) >> 1) | ((x & 0x2222222222222222LL) << 1);
}
WRITE_RD(sext_xlen(x));

29
riscv/insns/bmator.h

@ -0,0 +1,29 @@
require_rv64;
require_extension('B');
// transpose of rs2
int64_t rs2t = RS2;
for (int i = 0; i < 3; i++) {
rs2t = (rs2t & 0xFFFF00000000FFFFLL) | ((rs2t & 0x0000FFFF00000000LL) >> 16) | ((rs2t & 0x00000000FFFF0000LL) << 16);
rs2t = (rs2t & 0xFF0000FFFF0000FFLL) | ((rs2t & 0x00FF000000FF0000LL) >> 8) | ((rs2t & 0x0000FF000000FF00LL) << 8);
rs2t = (rs2t & 0xF00FF00FF00FF00FLL) | ((rs2t & 0x0F000F000F000F00LL) >> 4) | ((rs2t & 0x00F000F000F000F0LL) << 4);
rs2t = (rs2t & 0xC3C3C3C3C3C3C3C3LL) | ((rs2t & 0x3030303030303030LL) >> 2) | ((rs2t & 0x0C0C0C0C0C0C0C0CLL) << 2);
rs2t = (rs2t & 0x9999999999999999LL) | ((rs2t & 0x4444444444444444LL) >> 1) | ((rs2t & 0x2222222222222222LL) << 1);
}
int64_t rs1 = RS1;
uint8_t u[8]; // rows of rs1
uint8_t v[8]; // cols of rs2
for (int i = 0; i < 8; i++) {
u[i] = rs1 >> (i*8);
v[i] = rs2t >> (i*8);
}
uint64_t x = 0;
for (int i = 0; i < 64; i++) {
if ((u[i / 8] & v[i % 8]) != 0)
x |= 1LL << i;
}
WRITE_RD(sext_xlen(x));

29
riscv/insns/bmatxor.h

@ -0,0 +1,29 @@
require_rv64;
require_extension('B');
// transpose of rs2
int64_t rs2t = RS2;
for (int i = 0; i < 3; i++) {
rs2t = (rs2t & 0xFFFF00000000FFFFLL) | ((rs2t & 0x0000FFFF00000000LL) >> 16) | ((rs2t & 0x00000000FFFF0000LL) << 16);
rs2t = (rs2t & 0xFF0000FFFF0000FFLL) | ((rs2t & 0x00FF000000FF0000LL) >> 8) | ((rs2t & 0x0000FF000000FF00LL) << 8);
rs2t = (rs2t & 0xF00FF00FF00FF00FLL) | ((rs2t & 0x0F000F000F000F00LL) >> 4) | ((rs2t & 0x00F000F000F000F0LL) << 4);
rs2t = (rs2t & 0xC3C3C3C3C3C3C3C3LL) | ((rs2t & 0x3030303030303030LL) >> 2) | ((rs2t & 0x0C0C0C0C0C0C0C0CLL) << 2);
rs2t = (rs2t & 0x9999999999999999LL) | ((rs2t & 0x4444444444444444LL) >> 1) | ((rs2t & 0x2222222222222222LL) << 1);
}
int64_t rs1 = RS1;
uint8_t u[8]; // rows of rs1
uint8_t v[8]; // cols of rs2
for (int i = 0; i < 8; i++) {
u[i] = rs1 >> (i*8);
v[i] = rs2t >> (i*8);
}
uint64_t x = 0;
for (int i = 0; i < 64; i++) {
if (__builtin_popcountl(u[i / 8] & v[i % 8]) & 1)
x |= 1LL << i;
}
WRITE_RD(sext_xlen(x));

6
riscv/insns/clmul.h

@ -0,0 +1,6 @@
require_extension('B');
reg_t a = zext_xlen(RS1), b = zext_xlen(RS2), x = 0;
for (int i = 0; i < xlen; i++)
if ((b >> i) & 1)
x ^= a << i;
WRITE_RD(sext_xlen(x));

6
riscv/insns/clmulh.h

@ -0,0 +1,6 @@
require_extension('B');
reg_t a = zext_xlen(RS1), b = zext_xlen(RS2), x = 0;
for (int i = 1; i < xlen; i++)
if ((b >> i) & 1)
x ^= a >> (xlen-i);
WRITE_RD(sext_xlen(x));

6
riscv/insns/clmulhw.h

@ -0,0 +1,6 @@
require_extension('B');
reg_t a = zext32(RS1), b = zext32(RS2), x = 0;
for (int i = 1; i < 32; i++)
if ((b >> i) & 1)
x ^= a >> (32-i);
WRITE_RD(sext32(x));

6
riscv/insns/clmulr.h

@ -0,0 +1,6 @@
require_extension('B');
reg_t a = zext_xlen(RS1), b = zext_xlen(RS2), x = 0;
for (int i = 0; i < xlen; i++)
if ((b >> i) & 1)
x ^= a >> (xlen-i-1);
WRITE_RD(sext_xlen(x));

6
riscv/insns/clmulrw.h

@ -0,0 +1,6 @@
require_extension('B');
reg_t a = zext32(RS1), b = zext32(RS2), x = 0;
for (int i = 0; i < 32; i++)
if ((b >> i) & 1)
x ^= a >> (31-i);
WRITE_RD(sext32(x));

6
riscv/insns/clmulw.h

@ -0,0 +1,6 @@
require_extension('B');
reg_t a = zext32(RS1), b = zext32(RS2), x = 0;
for (int i = 0; i < 32; i++)
if ((b >> i) & 1)
x ^= a << i;
WRITE_RD(sext32(x));

5
riscv/insns/clz.h

@ -0,0 +1,5 @@
require_extension('B');
reg_t x = xlen;
for (int i = 0; i < xlen; i++)
if (1 & (RS1 >> (xlen-i-1))) { x = i; break; }
WRITE_RD(sext_xlen(x));

6
riscv/insns/clzw.h

@ -0,0 +1,6 @@
require_rv64;
require_extension('B');
reg_t x = 32;
for (int i = 0; i < 32; i++)
if (1 & (RS1 >> (31-i))) { x = i; break; }
WRITE_RD(sext32(x));

2
riscv/insns/cmix.h

@ -0,0 +1,2 @@
require_extension('B');
WRITE_RD((RS1 & RS2) | (RS3 & ~RS2));

2
riscv/insns/cmov.h

@ -0,0 +1,2 @@
require_extension('B');
WRITE_RD(RS2 ? RS1 : RS3);

5
riscv/insns/crc32_b.h

@ -0,0 +1,5 @@
require_extension('B');
reg_t x = zext_xlen(RS1);
for (int i = 0; i < 8; i++)
x = (x >> 1) ^ (0xEDB88320 & ~((x&1)-1));
WRITE_RD(sext_xlen(x));

5
riscv/insns/crc32_d.h

@ -0,0 +1,5 @@
require_extension('B');
reg_t x = zext_xlen(RS1);
for (int i = 0; i < 64; i++)
x = (x >> 1) ^ (0xEDB88320 & ~((x&1)-1));
WRITE_RD(sext_xlen(x));

5
riscv/insns/crc32_h.h

@ -0,0 +1,5 @@
require_extension('B');
reg_t x = zext_xlen(RS1);
for (int i = 0; i < 16; i++)
x = (x >> 1) ^ (0xEDB88320 & ~((x&1)-1));
WRITE_RD(sext_xlen(x));

5
riscv/insns/crc32_w.h

@ -0,0 +1,5 @@
require_extension('B');
reg_t x = zext_xlen(RS1);
for (int i = 0; i < 32; i++)
x = (x >> 1) ^ (0xEDB88320 & ~((x&1)-1));
WRITE_RD(sext_xlen(x));

5
riscv/insns/crc32c_b.h

@ -0,0 +1,5 @@
require_extension('B');
reg_t x = zext_xlen(RS1);
for (int i = 0; i < 8; i++)
x = (x >> 1) ^ (0x82F63B78 & ~((x&1)-1));
WRITE_RD(sext_xlen(x));

5
riscv/insns/crc32c_d.h

@ -0,0 +1,5 @@
require_extension('B');
reg_t x = zext_xlen(RS1);
for (int i = 0; i < 64; i++)
x = (x >> 1) ^ (0x82F63B78 & ~((x&1)-1));
WRITE_RD(sext_xlen(x));

5
riscv/insns/crc32c_h.h

@ -0,0 +1,5 @@
require_extension('B');
reg_t x = zext_xlen(RS1);
for (int i = 0; i < 16; i++)
x = (x >> 1) ^ (0x82F63B78 & ~((x&1)-1));
WRITE_RD(sext_xlen(x));

5
riscv/insns/crc32c_w.h

@ -0,0 +1,5 @@
require_extension('B');
reg_t x = zext_xlen(RS1);
for (int i = 0; i < 32; i++)
x = (x >> 1) ^ (0x82F63B78 & ~((x&1)-1));
WRITE_RD(sext_xlen(x));

5
riscv/insns/ctz.h

@ -0,0 +1,5 @@
require_extension('B');
reg_t x = xlen;
for (int i = 0; i < xlen; i++)
if (1 & (RS1 >> i)) { x = i; break; }
WRITE_RD(sext_xlen(x));

6
riscv/insns/ctzw.h

@ -0,0 +1,6 @@
require_rv64;
require_extension('B');
reg_t x = 32;
for (int i = 0; i < 32; i++)
if (1 & (RS1 >> i)) { x = i; break; }
WRITE_RD(sext32(x));

9
riscv/insns/fsl.h

@ -0,0 +1,9 @@
require_extension('B');
int shamt = RS2 & (2*xlen-1);
reg_t a = RS1, b = RS3;
if (shamt >= xlen) {
a = RS3, b = RS1;
shamt -= xlen;
}
int rshamt = -shamt & (xlen-1);
WRITE_RD(sext_xlen(shamt ? (a << shamt) | (zext_xlen(b) >> rshamt) : a));

10
riscv/insns/fslw.h

@ -0,0 +1,10 @@
require_rv64;
require_extension('B');
int shamt = RS2 & 63;
reg_t a = RS1, b = RS3;
if (shamt >= 32) {
a = RS3, b = RS1;
shamt -= 32;
}
int rshamt = -shamt & 31;
WRITE_RD(sext32(shamt ? (a << shamt) | (zext32(b) >> rshamt) : a));

9
riscv/insns/fsr.h

@ -0,0 +1,9 @@
require_extension('B');
int shamt = RS2 & (2*xlen-1);
reg_t a = RS1, b = RS3;
if (shamt >= xlen) {
a = RS3, b = RS1;
shamt -= xlen;
}
int rshamt = -shamt & (xlen-1);
WRITE_RD(sext_xlen(shamt ? (b << rshamt) | (zext_xlen(a) >> shamt) : a));

9
riscv/insns/fsri.h

@ -0,0 +1,9 @@
require_extension('B');
int shamt = SHAMT & (2*xlen-1);
reg_t a = RS1, b = RS3;
if (shamt >= xlen) {
a = RS3, b = RS1;
shamt -= xlen;
}
int rshamt = -shamt & (xlen-1);
WRITE_RD(sext_xlen(shamt ? (b << rshamt) | (zext_xlen(a) >> shamt) : a));

10
riscv/insns/fsriw.h

@ -0,0 +1,10 @@
require_rv64;
require_extension('B');
int shamt = SHAMT & 63;
reg_t a = RS1, b = RS3;
if (shamt >= 32) {
a = RS3, b = RS1;
shamt -= 32;
}
int rshamt = -shamt & 31;
WRITE_RD(sext32(shamt ? (b << rshamt) | (zext32(a) >> shamt) : a));

10
riscv/insns/fsrw.h

@ -0,0 +1,10 @@
require_rv64;
require_extension('B');
int shamt = RS2 & 63;
reg_t a = RS1, b = RS3;
if (shamt >= 32) {
a = RS3, b = RS1;
shamt -= 32;
}
int rshamt = -shamt & 31;
WRITE_RD(sext32(shamt ? (b << rshamt) | (zext32(a) >> shamt) : a));

10
riscv/insns/gorc.h

@ -0,0 +1,10 @@
require_extension('B');
reg_t x = RS1;
int shamt = RS2 & (xlen-1);
if (shamt & 1) x |= ((x & 0x5555555555555555LL) << 1) | ((x & 0xAAAAAAAAAAAAAAAALL) >> 1);
if (shamt & 2) x |= ((x & 0x3333333333333333LL) << 2) | ((x & 0xCCCCCCCCCCCCCCCCLL) >> 2);
if (shamt & 4) x |= ((x & 0x0F0F0F0F0F0F0F0FLL) << 4) | ((x & 0xF0F0F0F0F0F0F0F0LL) >> 4);
if (shamt & 8) x |= ((x & 0x00FF00FF00FF00FFLL) << 8) | ((x & 0xFF00FF00FF00FF00LL) >> 8);
if (shamt & 16) x |= ((x & 0x0000FFFF0000FFFFLL) << 16) | ((x & 0xFFFF0000FFFF0000LL) >> 16);
if (shamt & 32) x |= ((x & 0x00000000FFFFFFFFLL) << 32) | ((x & 0xFFFFFFFF00000000LL) >> 32);
WRITE_RD(sext_xlen(x));

11
riscv/insns/gorci.h

@ -0,0 +1,11 @@
require_extension('B');
require(SHAMT < xlen);
reg_t x = RS1;
int shamt = SHAMT;
if (shamt & 1) x |= ((x & 0x5555555555555555LL) << 1) | ((x & 0xAAAAAAAAAAAAAAAALL) >> 1);
if (shamt & 2) x |= ((x & 0x3333333333333333LL) << 2) | ((x & 0xCCCCCCCCCCCCCCCCLL) >> 2);
if (shamt & 4) x |= ((x & 0x0F0F0F0F0F0F0F0FLL) << 4) | ((x & 0xF0F0F0F0F0F0F0F0LL) >> 4);
if (shamt & 8) x |= ((x & 0x00FF00FF00FF00FFLL) << 8) | ((x & 0xFF00FF00FF00FF00LL) >> 8);
if (shamt & 16) x |= ((x & 0x0000FFFF0000FFFFLL) << 16) | ((x & 0xFFFF0000FFFF0000LL) >> 16);
if (shamt & 32) x |= ((x & 0x00000000FFFFFFFFLL) << 32) | ((x & 0xFFFFFFFF00000000LL) >> 32);
WRITE_RD(sext_xlen(x));

11
riscv/insns/gorciw.h

@ -0,0 +1,11 @@
require_rv64;
require_extension('B');
require(SHAMT < 32);
reg_t x = RS1;
int shamt = SHAMT;
if (shamt & 1) x |= ((x & 0x5555555555555555LL) << 1) | ((x & 0xAAAAAAAAAAAAAAAALL) >> 1);
if (shamt & 2) x |= ((x & 0x3333333333333333LL) << 2) | ((x & 0xCCCCCCCCCCCCCCCCLL) >> 2);
if (shamt & 4) x |= ((x & 0x0F0F0F0F0F0F0F0FLL) << 4) | ((x & 0xF0F0F0F0F0F0F0F0LL) >> 4);
if (shamt & 8) x |= ((x & 0x00FF00FF00FF00FFLL) << 8) | ((x & 0xFF00FF00FF00FF00LL) >> 8);
if (shamt & 16) x |= ((x & 0x0000FFFF0000FFFFLL) << 16) | ((x & 0xFFFF0000FFFF0000LL) >> 16);
WRITE_RD(sext32(x));

10
riscv/insns/gorcw.h

@ -0,0 +1,10 @@
require_rv64;
require_extension('B');
reg_t x = RS1;
int shamt = RS2 & 31;
if (shamt & 1) x |= ((x & 0x5555555555555555LL) << 1) | ((x & 0xAAAAAAAAAAAAAAAALL) >> 1);
if (shamt & 2) x |= ((x & 0x3333333333333333LL) << 2) | ((x & 0xCCCCCCCCCCCCCCCCLL) >> 2);
if (shamt & 4) x |= ((x & 0x0F0F0F0F0F0F0F0FLL) << 4) | ((x & 0xF0F0F0F0F0F0F0F0LL) >> 4);
if (shamt & 8) x |= ((x & 0x00FF00FF00FF00FFLL) << 8) | ((x & 0xFF00FF00FF00FF00LL) >> 8);
if (shamt & 16) x |= ((x & 0x0000FFFF0000FFFFLL) << 16) | ((x & 0xFFFF0000FFFF0000LL) >> 16);
WRITE_RD(sext32(x));

10
riscv/insns/grev.h

@ -0,0 +1,10 @@
require_extension('B');
reg_t x = RS1;
int shamt = RS2 & (xlen-1);
if (shamt & 1) x = ((x & 0x5555555555555555LL) << 1) | ((x & 0xAAAAAAAAAAAAAAAALL) >> 1);
if (shamt & 2) x = ((x & 0x3333333333333333LL) << 2) | ((x & 0xCCCCCCCCCCCCCCCCLL) >> 2);
if (shamt & 4) x = ((x & 0x0F0F0F0F0F0F0F0FLL) << 4) | ((x & 0xF0F0F0F0F0F0F0F0LL) >> 4);
if (shamt & 8) x = ((x & 0x00FF00FF00FF00FFLL) << 8) | ((x & 0xFF00FF00FF00FF00LL) >> 8);
if (shamt & 16) x = ((x & 0x0000FFFF0000FFFFLL) << 16) | ((x & 0xFFFF0000FFFF0000LL) >> 16);
if (shamt & 32) x = ((x & 0x00000000FFFFFFFFLL) << 32) | ((x & 0xFFFFFFFF00000000LL) >> 32);
WRITE_RD(sext_xlen(x));

11
riscv/insns/grevi.h

@ -0,0 +1,11 @@
require_extension('B');
require(SHAMT < xlen);
reg_t x = RS1;
int shamt = SHAMT;
if (shamt & 1) x = ((x & 0x5555555555555555LL) << 1) | ((x & 0xAAAAAAAAAAAAAAAALL) >> 1);
if (shamt & 2) x = ((x & 0x3333333333333333LL) << 2) | ((x & 0xCCCCCCCCCCCCCCCCLL) >> 2);
if (shamt & 4) x = ((x & 0x0F0F0F0F0F0F0F0FLL) << 4) | ((x & 0xF0F0F0F0F0F0F0F0LL) >> 4);
if (shamt & 8) x = ((x & 0x00FF00FF00FF00FFLL) << 8) | ((x & 0xFF00FF00FF00FF00LL) >> 8);
if (shamt & 16) x = ((x & 0x0000FFFF0000FFFFLL) << 16) | ((x & 0xFFFF0000FFFF0000LL) >> 16);
if (shamt & 32) x = ((x & 0x00000000FFFFFFFFLL) << 32) | ((x & 0xFFFFFFFF00000000LL) >> 32);
WRITE_RD(sext_xlen(x));

11
riscv/insns/greviw.h

@ -0,0 +1,11 @@
require_rv64;
require_extension('B');
require(SHAMT < 32);
reg_t x = RS1;
int shamt = SHAMT;
if (shamt & 1) x = ((x & 0x5555555555555555LL) << 1) | ((x & 0xAAAAAAAAAAAAAAAALL) >> 1);
if (shamt & 2) x = ((x & 0x3333333333333333LL) << 2) | ((x & 0xCCCCCCCCCCCCCCCCLL) >> 2);
if (shamt & 4) x = ((x & 0x0F0F0F0F0F0F0F0FLL) << 4) | ((x & 0xF0F0F0F0F0F0F0F0LL) >> 4);
if (shamt & 8) x = ((x & 0x00FF00FF00FF00FFLL) << 8) | ((x & 0xFF00FF00FF00FF00LL) >> 8);
if (shamt & 16) x = ((x & 0x0000FFFF0000FFFFLL) << 16) | ((x & 0xFFFF0000FFFF0000LL) >> 16);
WRITE_RD(sext32(x));

10
riscv/insns/grevw.h

@ -0,0 +1,10 @@
require_rv64;
require_extension('B');
reg_t x = RS1;
int shamt = RS2 & 31;
if (shamt & 1) x = ((x & 0x5555555555555555LL) << 1) | ((x & 0xAAAAAAAAAAAAAAAALL) >> 1);
if (shamt & 2) x = ((x & 0x3333333333333333LL) << 2) | ((x & 0xCCCCCCCCCCCCCCCCLL) >> 2);
if (shamt & 4) x = ((x & 0x0F0F0F0F0F0F0F0FLL) << 4) | ((x & 0xF0F0F0F0F0F0F0F0LL) >> 4);
if (shamt & 8) x = ((x & 0x00FF00FF00FF00FFLL) << 8) | ((x & 0xFF00FF00FF00FF00LL) >> 8);
if (shamt & 16) x = ((x & 0x0000FFFF0000FFFFLL) << 16) | ((x & 0xFFFF0000FFFF0000LL) >> 16);
WRITE_RD(sext32(x));

2
riscv/insns/max.h

@ -0,0 +1,2 @@
require_extension('B');
WRITE_RD(sext_xlen(sreg_t(RS1) > sreg_t(RS2) ? RS1 : RS2));

2
riscv/insns/maxu.h

@ -0,0 +1,2 @@
require_extension('B');
WRITE_RD(sext_xlen(RS1 > RS2 ? RS1 : RS2));

2
riscv/insns/min.h

@ -0,0 +1,2 @@
require_extension('B');
WRITE_RD(sext_xlen(sreg_t(RS1) < sreg_t(RS2) ? RS1 : RS2));

2
riscv/insns/minu.h

@ -0,0 +1,2 @@
require_extension('B');
WRITE_RD(sext_xlen(RS1 < RS2 ? RS1 : RS2));

2
riscv/insns/orn.h

@ -0,0 +1,2 @@
require_extension('B');
WRITE_RD(RS1 | ~RS2);

4
riscv/insns/pack.h

@ -0,0 +1,4 @@
require_extension('B');
reg_t lo = zext_xlen(RS1 << (xlen/2)) >> (xlen/2);
reg_t hi = zext_xlen(RS2 << (xlen/2));
WRITE_RD(sext_xlen(lo | hi));

4
riscv/insns/packh.h

@ -0,0 +1,4 @@
require_extension('B');
reg_t lo = zext_xlen(RS1 << (xlen-8)) >> (xlen-8);
reg_t hi = zext_xlen(RS2 << (xlen-8)) >> (xlen-16);
WRITE_RD(sext_xlen(lo | hi));

4
riscv/insns/packu.h

@ -0,0 +1,4 @@
require_extension('B');
reg_t lo = zext_xlen(RS1) >> (xlen/2);
reg_t hi = zext_xlen(RS2) >> (xlen/2) << (xlen/2);
WRITE_RD(sext_xlen(lo | hi));

4
riscv/insns/packuw.h

@ -0,0 +1,4 @@
require_extension('B');
reg_t lo = zext32(RS1) >> 16;
reg_t hi = zext32(RS2) >> 16 << 16;
WRITE_RD(sext32(lo | hi));

4
riscv/insns/packw.h

@ -0,0 +1,4 @@
require_extension('B');
reg_t lo = zext32(RS1 << 16) >> 16;
reg_t hi = zext32(RS2 << 16);
WRITE_RD(sext32(lo | hi));

5
riscv/insns/pcnt.h

@ -0,0 +1,5 @@
require_extension('B');
reg_t x = 0;
for (int i = 0; i < xlen; i++)
if (1 & (RS1 >> i)) x++;
WRITE_RD(sext_xlen(x));

6
riscv/insns/pcntw.h

@ -0,0 +1,6 @@
require_rv64;
require_extension('B');
reg_t x = 0;
for (int i = 0; i < 32; i++)
if (1 & (RS1 >> i)) x++;
WRITE_RD(sext32(x));

4
riscv/insns/rol.h

@ -0,0 +1,4 @@
require_extension('B');
int shamt = RS2 & (xlen-1);
int rshamt = -shamt & (xlen-1);
WRITE_RD(sext_xlen((RS1 << shamt) | (zext_xlen(RS1) >> rshamt)));

5
riscv/insns/rolw.h

@ -0,0 +1,5 @@
require_rv64;
require_extension('B');
int shamt = RS2 & 31;
int rshamt = -shamt & 31;
WRITE_RD(sext32((RS1 << shamt) | (zext32(RS1) >> rshamt)));

4
riscv/insns/ror.h

@ -0,0 +1,4 @@
require_extension('B');
int shamt = RS2 & (xlen-1);
int rshamt = -shamt & (xlen-1);
WRITE_RD(sext_xlen((RS1 << rshamt) | (zext_xlen(RS1) >> shamt)));

5
riscv/insns/rori.h

@ -0,0 +1,5 @@
require_extension('B');
require(SHAMT < xlen);
int shamt = SHAMT & (xlen-1);
int rshamt = -shamt & (xlen-1);
WRITE_RD(sext_xlen((RS1 << rshamt) | (zext_xlen(RS1) >> shamt)));

5
riscv/insns/roriw.h

@ -0,0 +1,5 @@
require_extension('B');
require(SHAMT < 32);
int shamt = SHAMT & 31;
int rshamt = -shamt & 31;
WRITE_RD(sext32((RS1 << rshamt) | (zext32(RS1) >> shamt)));

5
riscv/insns/rorw.h

@ -0,0 +1,5 @@
require_rv64;
require_extension('B');
int shamt = RS2 & 31;
int rshamt = -shamt & 31;
WRITE_RD(sext32((RS1 << rshamt) | (zext32(RS1) >> shamt)));

3
riscv/insns/sbclr.h

@ -0,0 +1,3 @@
require_extension('B');
int shamt = RS2 & (xlen-1);
WRITE_RD(sext_xlen(RS1 & ~(1LL << shamt)));

3
riscv/insns/sbclri.h

@ -0,0 +1,3 @@
require_extension('B');
int shamt = SHAMT & (xlen-1);
WRITE_RD(sext_xlen(RS1 & ~(1LL << shamt)));

3
riscv/insns/sbclriw.h

@ -0,0 +1,3 @@
require_extension('B');
int shamt = SHAMT & 31;
WRITE_RD(sext32(RS1 & ~(1LL << shamt)));

3
riscv/insns/sbclrw.h

@ -0,0 +1,3 @@
require_extension('B');
int shamt = RS2 & 31;
WRITE_RD(sext32(RS1 & ~(1LL << shamt)));

3
riscv/insns/sbext.h

@ -0,0 +1,3 @@
require_extension('B');
int shamt = RS2 & (xlen-1);
WRITE_RD(sext_xlen(1 & (RS1 >> shamt)));

3
riscv/insns/sbexti.h

@ -0,0 +1,3 @@
require_extension('B');
int shamt = SHAMT & (xlen-1);
WRITE_RD(sext_xlen(1 & (RS1 >> shamt)));

3
riscv/insns/sbextw.h

@ -0,0 +1,3 @@
require_extension('B');
int shamt = RS2 & 31;
WRITE_RD(sext32(1 & (RS1 >> shamt)));

3
riscv/insns/sbinv.h

@ -0,0 +1,3 @@
require_extension('B');
int shamt = RS2 & (xlen-1);
WRITE_RD(sext_xlen(RS1 ^ (1LL << shamt)));

3
riscv/insns/sbinvi.h

@ -0,0 +1,3 @@
require_extension('B');
int shamt = SHAMT & (xlen-1);
WRITE_RD(sext_xlen(RS1 ^ (1LL << shamt)));

3
riscv/insns/sbinviw.h

@ -0,0 +1,3 @@
require_extension('B');
int shamt = SHAMT & 31;
WRITE_RD(sext32(RS1 ^ (1LL << shamt)));

3
riscv/insns/sbinvw.h

@ -0,0 +1,3 @@
require_extension('B');
int shamt = RS2 & 31;
WRITE_RD(sext32(RS1 ^ (1LL << shamt)));

3
riscv/insns/sbset.h

@ -0,0 +1,3 @@
require_extension('B');
int shamt = RS2 & (xlen-1);
WRITE_RD(sext_xlen(RS1 | (1LL << shamt)));

3
riscv/insns/sbseti.h

@ -0,0 +1,3 @@
require_extension('B');
int shamt = SHAMT & (xlen-1);
WRITE_RD(sext_xlen(RS1 | (1LL << shamt)));

3
riscv/insns/sbsetiw.h

@ -0,0 +1,3 @@
require_extension('B');
int shamt = SHAMT & 31;
WRITE_RD(sext32(RS1 | (1LL << shamt)));

3
riscv/insns/sbsetw.h

@ -0,0 +1,3 @@
require_extension('B');
int shamt = RS2 & 31;
WRITE_RD(sext32(RS1 | (1LL << shamt)));

2
riscv/insns/sext_b.h

@ -0,0 +1,2 @@
require_extension('B');
WRITE_RD((sreg_t)(int8_t)(RS1));

2
riscv/insns/sext_h.h

@ -0,0 +1,2 @@
require_extension('B');
WRITE_RD((sreg_t)(int16_t)(RS1));

2
riscv/insns/sh1add.h

@ -0,0 +1,2 @@
require_extension('B');
WRITE_RD(sext_xlen((RS1 << 1) + RS2));

3
riscv/insns/sh1addu_w.h

@ -0,0 +1,3 @@
require_rv64;
require_extension('B');
WRITE_RD(sext_xlen((zext32(RS1) << 1) + RS2));

2
riscv/insns/sh2add.h

@ -0,0 +1,2 @@
require_extension('B');
WRITE_RD(sext_xlen((RS1 << 2) + RS2));

3
riscv/insns/sh2addu_w.h

@ -0,0 +1,3 @@
require_rv64;
require_extension('B');
WRITE_RD(sext_xlen((zext32(RS1) << 2) + RS2));

2
riscv/insns/sh3add.h

@ -0,0 +1,2 @@
require_extension('B');
WRITE_RD(sext_xlen((RS1 << 3) + RS2));

3
riscv/insns/sh3addu_w.h

@ -0,0 +1,3 @@
require_rv64;
require_extension('B');
WRITE_RD(sext_xlen((zext32(RS1) << 3) + RS2));

9
riscv/insns/shfl.h

@ -0,0 +1,9 @@
require_extension('B');
reg_t x = RS1;
int shamt = RS2 & ((xlen-1) >> 1);
if (shamt & 16) x = (x & 0xFFFF00000000FFFFLL) | ((x & 0x0000FFFF00000000LL) >> 16) | ((x & 0x00000000FFFF0000LL) << 16);
if (shamt & 8) x = (x & 0xFF0000FFFF0000FFLL) | ((x & 0x00FF000000FF0000LL) >> 8) | ((x & 0x0000FF000000FF00LL) << 8);
if (shamt & 4) x = (x & 0xF00FF00FF00FF00FLL) | ((x & 0x0F000F000F000F00LL) >> 4) | ((x & 0x00F000F000F000F0LL) << 4);
if (shamt & 2) x = (x & 0xC3C3C3C3C3C3C3C3LL) | ((x & 0x3030303030303030LL) >> 2) | ((x & 0x0C0C0C0C0C0C0C0CLL) << 2);
if (shamt & 1) x = (x & 0x9999999999999999LL) | ((x & 0x4444444444444444LL) >> 1) | ((x & 0x2222222222222222LL) << 1);
WRITE_RD(sext_xlen(x));

10
riscv/insns/shfli.h

@ -0,0 +1,10 @@
require_extension('B');
require(SHAMT < (xlen/2));
reg_t x = RS1;
int shamt = SHAMT & ((xlen-1) >> 1);
if (shamt & 16) x = (x & 0xFFFF00000000FFFFLL) | ((x & 0x0000FFFF00000000LL) >> 16) | ((x & 0x00000000FFFF0000LL) << 16);
if (shamt & 8) x = (x & 0xFF0000FFFF0000FFLL) | ((x & 0x00FF000000FF0000LL) >> 8) | ((x & 0x0000FF000000FF00LL) << 8);
if (shamt & 4) x = (x & 0xF00FF00FF00FF00FLL) | ((x & 0x0F000F000F000F00LL) >> 4) | ((x & 0x00F000F000F000F0LL) << 4);
if (shamt & 2) x = (x & 0xC3C3C3C3C3C3C3C3LL) | ((x & 0x3030303030303030LL) >> 2) | ((x & 0x0C0C0C0C0C0C0C0CLL) << 2);
if (shamt & 1) x = (x & 0x9999999999999999LL) | ((x & 0x4444444444444444LL) >> 1) | ((x & 0x2222222222222222LL) << 1);
WRITE_RD(sext_xlen(x));

9
riscv/insns/shflw.h

@ -0,0 +1,9 @@
require_rv64;
require_extension('B');
reg_t x = RS1;
int shamt = RS2 & 15;
if (shamt & 8) x = (x & 0xFF0000FFFF0000FFLL) | ((x & 0x00FF000000FF0000LL) >> 8) | ((x & 0x0000FF000000FF00LL) << 8);
if (shamt & 4) x = (x & 0xF00FF00FF00FF00FLL) | ((x & 0x0F000F000F000F00LL) >> 4) | ((x & 0x00F000F000F000F0LL) << 4);
if (shamt & 2) x = (x & 0xC3C3C3C3C3C3C3C3LL) | ((x & 0x3030303030303030LL) >> 2) | ((x & 0x0C0C0C0C0C0C0C0CLL) << 2);
if (shamt & 1) x = (x & 0x9999999999999999LL) | ((x & 0x4444444444444444LL) >> 1) | ((x & 0x2222222222222222LL) << 1);
WRITE_RD(sext32(x));

3
riscv/insns/slliu_w.h

@ -0,0 +1,3 @@
require_rv64;
require_extension('B');
WRITE_RD(sext_xlen(zext32(RS1) << SHAMT));

2
riscv/insns/slo.h

@ -0,0 +1,2 @@
require_extension('B');
WRITE_RD(sext_xlen(~((~RS1) << (RS2 & (xlen-1)))));

3
riscv/insns/sloi.h

@ -0,0 +1,3 @@
require(SHAMT < xlen);
require_extension('B');
WRITE_RD(sext_xlen(~((~RS1) << SHAMT)));

3
riscv/insns/sloiw.h

@ -0,0 +1,3 @@
require_rv64;
require_extension('B');
WRITE_RD(sext32(~((~RS1) << SHAMT)));

3
riscv/insns/slow.h

@ -0,0 +1,3 @@
require_rv64;
require_extension('B');
WRITE_RD(sext32(~((~RS1) << (RS2 & 0x1F))));

2
riscv/insns/sro.h

@ -0,0 +1,2 @@
require_extension('B');
WRITE_RD(sext_xlen(~((zext_xlen(~RS1)) >> (RS2 & (xlen-1)))));

3
riscv/insns/sroi.h

@ -0,0 +1,3 @@
require(SHAMT < xlen);
require_extension('B');
WRITE_RD(sext_xlen(~((zext_xlen(~RS1)) >> SHAMT)));

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