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Add cfg.cc to hold internal implementation of mem_cfg_t

pull/1180/head
Jerry Zhao 3 years ago
parent
commit
ebc9367677
  1. 23
      riscv/cfg.cc
  2. 18
      riscv/cfg.h
  3. 1
      riscv/riscv.mk.in

23
riscv/cfg.cc

@ -0,0 +1,23 @@
// See LICENSE for license details.
#include "cfg.h"
#include "mmu.h"
#include "decode.h"
mem_cfg_t::mem_cfg_t(reg_t base, reg_t size) : base(base), size(size)
{
assert(mem_cfg_t::check_if_supported(base, size));
}
bool mem_cfg_t::check_if_supported(reg_t base, reg_t size)
{
// The truth of these conditions should be ensured by whatever is creating
// the regions in the first place, but we have them here to make sure that
// we can't end up describing memory regions that don't make sense. They
// ask that the page size is a multiple of the minimum page size, that the
// page is aligned to the minimum page size, that the page is non-empty and
// that the top address is still representable in a reg_t.
return (size % PGSIZE == 0) &&
(base % PGSIZE == 0) &&
(base + size > base);
}

18
riscv/cfg.h

@ -32,23 +32,9 @@ private:
class mem_cfg_t class mem_cfg_t
{ {
public: public:
static bool check_if_supported(reg_t base, reg_t size) { static bool check_if_supported(reg_t base, reg_t size);
// The truth of these conditions should be ensured by whatever is creating
// the regions in the first place, but we have them here to make sure that
// we can't end up describing memory regions that don't make sense. They
// ask that the page size is a multiple of the minimum page size, that the
// page is aligned to the minimum page size, that the page is non-empty and
// that the top address is still representable in a reg_t.
return (size % PGSIZE == 0) &&
(base % PGSIZE == 0) &&
(base + size > base);
}
mem_cfg_t(reg_t base, reg_t size) mem_cfg_t(reg_t base, reg_t size);
: base(base), size(size)
{
assert(mem_cfg_t::check_if_supported(base, size));
}
reg_t base; reg_t base;
reg_t size; reg_t size;

1
riscv/riscv.mk.in

@ -98,6 +98,7 @@ riscv_srcs = \
triggers.cc \ triggers.cc \
vector_unit.cc \ vector_unit.cc \
socketif.cc \ socketif.cc \
cfg.cc \
$(riscv_gen_srcs) \ $(riscv_gen_srcs) \
riscv_test_srcs = riscv_test_srcs =

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