From ebc936767735fcd152cf51e6223dc2294b658d92 Mon Sep 17 00:00:00 2001
From: Jerry Zhao <jerryz123@berkeley.edu>
Date: Tue, 13 Dec 2022 16:26:11 -0800
Subject: [PATCH] Add cfg.cc to hold internal implementation of mem_cfg_t

---
 riscv/cfg.cc      | 23 +++++++++++++++++++++++
 riscv/cfg.h       | 18 ++----------------
 riscv/riscv.mk.in |  1 +
 3 files changed, 26 insertions(+), 16 deletions(-)
 create mode 100644 riscv/cfg.cc

diff --git a/riscv/cfg.cc b/riscv/cfg.cc
new file mode 100644
index 00000000..ef1d5790
--- /dev/null
+++ b/riscv/cfg.cc
@@ -0,0 +1,23 @@
+// See LICENSE for license details.
+
+#include "cfg.h"
+#include "mmu.h"
+#include "decode.h"
+
+mem_cfg_t::mem_cfg_t(reg_t base, reg_t size) : base(base), size(size)
+{
+  assert(mem_cfg_t::check_if_supported(base, size));
+}
+
+bool mem_cfg_t::check_if_supported(reg_t base, reg_t size)
+{
+  // The truth of these conditions should be ensured by whatever is creating
+  // the regions in the first place, but we have them here to make sure that
+  // we can't end up describing memory regions that don't make sense. They
+  // ask that the page size is a multiple of the minimum page size, that the
+  // page is aligned to the minimum page size, that the page is non-empty and
+  // that the top address is still representable in a reg_t.
+  return (size % PGSIZE == 0) &&
+         (base % PGSIZE == 0) &&
+         (base + size > base);
+}
diff --git a/riscv/cfg.h b/riscv/cfg.h
index f0f88e49..7e440ad4 100644
--- a/riscv/cfg.h
+++ b/riscv/cfg.h
@@ -32,23 +32,9 @@ private:
 class mem_cfg_t
 {
 public:
-  static bool check_if_supported(reg_t base, reg_t size) {
-    // The truth of these conditions should be ensured by whatever is creating
-    // the regions in the first place, but we have them here to make sure that
-    // we can't end up describing memory regions that don't make sense. They
-    // ask that the page size is a multiple of the minimum page size, that the
-    // page is aligned to the minimum page size, that the page is non-empty and
-    // that the top address is still representable in a reg_t.
-    return (size % PGSIZE == 0) &&
-           (base % PGSIZE == 0) &&
-           (base + size > base);
-  }
+  static bool check_if_supported(reg_t base, reg_t size);
 
-  mem_cfg_t(reg_t base, reg_t size)
-    : base(base), size(size)
-  {
-    assert(mem_cfg_t::check_if_supported(base, size));
-  }
+  mem_cfg_t(reg_t base, reg_t size);
 
   reg_t base;
   reg_t size;
diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in
index efe2bd0f..5b7c824b 100644
--- a/riscv/riscv.mk.in
+++ b/riscv/riscv.mk.in
@@ -98,6 +98,7 @@ riscv_srcs = \
 	triggers.cc \
 	vector_unit.cc \
 	socketif.cc \
+	cfg.cc \
 	$(riscv_gen_srcs) \
 
 riscv_test_srcs =