From 89be91cec3677f3f1143972de7ca85e2dc33dbff Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Fri, 5 Jun 2015 21:06:52 +0800 Subject: [PATCH 1/3] unify interactive core processing Different functions in here process the core argument in different ways. Unify all of them with a utility function. --- riscv/interactive.cc | 38 ++++++++++++++++++++------------------ riscv/sim.h | 1 + 2 files changed, 21 insertions(+), 18 deletions(-) diff --git a/riscv/interactive.cc b/riscv/interactive.cc index 8e584117..c4eb869d 100644 --- a/riscv/interactive.cc +++ b/riscv/interactive.cc @@ -18,6 +18,15 @@ #include #include +processor_t *sim_t::get_core(const std::string& i) +{ + char *ptr; + unsigned long p = strtoul(i.c_str(), &ptr, 10); + if (*ptr || p >= num_cores()) + throw trap_illegal_instruction(); + return get_core(p); +} + static std::string readline(int fd) { struct termios tios; @@ -150,11 +159,8 @@ reg_t sim_t::get_pc(const std::vector& args) if(args.size() != 1) throw trap_illegal_instruction(); - int p = atoi(args[0].c_str()); - if(p >= (int)num_cores()) - throw trap_illegal_instruction(); - - return procs[p]->state.pc; + processor_t *p = get_core(args[0]); + return p->state.pc; } reg_t sim_t::get_reg(const std::vector& args) @@ -162,16 +168,14 @@ reg_t sim_t::get_reg(const std::vector& args) if(args.size() != 2) throw trap_illegal_instruction(); - char* ptr; - unsigned long p = strtoul(args[0].c_str(), &ptr, 10); - if (*ptr || p >= num_cores()) - throw trap_illegal_instruction(); + processor_t *p = get_core(args[0]); unsigned long r = std::find(xpr_name, xpr_name + NXPR, args[1]) - xpr_name; if (r == NXPR) { + char *ptr; r = strtoul(args[1].c_str(), &ptr, 10); if (*ptr) { - #define DECLARE_CSR(name, number) if (args[1] == #name) return procs[p]->get_csr(number); + #define DECLARE_CSR(name, number) if (args[1] == #name) return p->get_csr(number); if (0) ; #include "encoding.h" else r = NXPR; @@ -182,7 +186,7 @@ reg_t sim_t::get_reg(const std::vector& args) if (r >= NXPR) throw trap_illegal_instruction(); - return procs[p]->state.XPR[r]; + return p->state.XPR[r]; } reg_t sim_t::get_freg(const std::vector& args) @@ -190,14 +194,14 @@ reg_t sim_t::get_freg(const std::vector& args) if(args.size() != 2) throw trap_illegal_instruction(); - int p = atoi(args[0].c_str()); + processor_t *p = get_core(args[0]); int r = std::find(fpr_name, fpr_name + NFPR, args[1]) - fpr_name; if (r == NFPR) r = atoi(args[1].c_str()); - if(p >= (int)num_cores() || r >= NFPR) + if (r >= NFPR) throw trap_illegal_instruction(); - return procs[p]->state.FPR[r]; + return p->state.FPR[r]; } void sim_t::interactive_reg(const std::string& cmd, const std::vector& args) @@ -235,10 +239,8 @@ reg_t sim_t::get_mem(const std::vector& args) mmu_t* mmu = debug_mmu; if(args.size() == 2) { - int p = atoi(args[0].c_str()); - if(p >= (int)num_cores()) - throw trap_illegal_instruction(); - mmu = procs[p]->get_mmu(); + processor_t *p = get_core(args[0]); + mmu = p->get_mmu(); addr_str = args[1]; } diff --git a/riscv/sim.h b/riscv/sim.h index 9b8f6e0f..8f7718a0 100644 --- a/riscv/sim.h +++ b/riscv/sim.h @@ -45,6 +45,7 @@ private: mmu_t* debug_mmu; // debug port into main memory std::vector procs; + processor_t* get_core(const std::string& i); void step(size_t n); // step through simulation static const size_t INTERLEAVE = 5000; static const size_t INSNS_PER_RTC_TICK = 100; // 10 MHz clock for 1 BIPS core From 74225c6f45ae5e79c03a73012fdfb64791d24748 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Fri, 5 Jun 2015 21:13:04 +0800 Subject: [PATCH 2/3] add an interactive "pc" command This lets you show the current pc quickly. Sometimes when displaying different state you can lose track of what the pc was. Add a simple command that plumbs in the existing functions to the user interface. --- riscv/interactive.cc | 7 +++++++ riscv/sim.h | 1 + 2 files changed, 8 insertions(+) diff --git a/riscv/interactive.cc b/riscv/interactive.cc index c4eb869d..689b53a4 100644 --- a/riscv/interactive.cc +++ b/riscv/interactive.cc @@ -66,6 +66,7 @@ void sim_t::interactive() funcs["reg"] = &sim_t::interactive_reg; funcs["fregs"] = &sim_t::interactive_fregs; funcs["fregd"] = &sim_t::interactive_fregd; + funcs["pc"] = &sim_t::interactive_pc; funcs["mem"] = &sim_t::interactive_mem; funcs["str"] = &sim_t::interactive_str; funcs["until"] = &sim_t::interactive_until; @@ -111,6 +112,7 @@ void sim_t::interactive_help(const std::string& cmd, const std::vector # Display in \n" "fregs # Display single precision in \n" "fregd # Display double precision in \n" + "pc # Show current PC in \n" "mem # Show contents of physical memory\n" "str # Show NUL-terminated C string\n" "until reg # Stop when in hits \n" @@ -163,6 +165,11 @@ reg_t sim_t::get_pc(const std::vector& args) return p->state.pc; } +void sim_t::interactive_pc(const std::string& cmd, const std::vector& args) +{ + fprintf(stderr, "0x%016" PRIx64 "\n", get_pc(args)); +} + reg_t sim_t::get_reg(const std::vector& args) { if(args.size() != 2) diff --git a/riscv/sim.h b/riscv/sim.h index 8f7718a0..0c7b0df2 100644 --- a/riscv/sim.h +++ b/riscv/sim.h @@ -67,6 +67,7 @@ private: void interactive_reg(const std::string& cmd, const std::vector& args); void interactive_fregs(const std::string& cmd, const std::vector& args); void interactive_fregd(const std::string& cmd, const std::vector& args); + void interactive_pc(const std::string& cmd, const std::vector& args); void interactive_mem(const std::string& cmd, const std::vector& args); void interactive_str(const std::string& cmd, const std::vector& args); void interactive_until(const std::string& cmd, const std::vector& args); From 3e8ad1eab377710dd1f2df192bdec20536b11840 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Fri, 5 Jun 2015 21:17:19 +0800 Subject: [PATCH 3/3] allow interactive "reg" command to dump all registers It you want to scan all the registers at once (or at least a few), having to dump them one by one is kind of a pain. Change the behavior so that if the register number is omitted, it'll dump all of them. --- riscv/interactive.cc | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/riscv/interactive.cc b/riscv/interactive.cc index 689b53a4..6ae1892f 100644 --- a/riscv/interactive.cc +++ b/riscv/interactive.cc @@ -109,7 +109,7 @@ void sim_t::interactive_help(const std::string& cmd, const std::vector # Display in \n" + "reg [reg] # Display [reg] (all if omitted) in \n" "fregs # Display single precision in \n" "fregd # Display double precision in \n" "pc # Show current PC in \n" @@ -213,7 +213,17 @@ reg_t sim_t::get_freg(const std::vector& args) void sim_t::interactive_reg(const std::string& cmd, const std::vector& args) { - fprintf(stderr, "0x%016" PRIx64 "\n", get_reg(args)); + if (args.size() == 1) { + // Show all the regs! + processor_t *p = get_core(args[0]); + + for (int r = 0; r < NFPR; ++r) { + fprintf(stderr, "%-4s: 0x%016" PRIx64 " ", xpr_name[r], p->state.XPR[r]); + if ((r + 1) % 4 == 0) + fprintf(stderr, "\n"); + } + } else + fprintf(stderr, "0x%016" PRIx64 "\n", get_reg(args)); } union fpr