rvp: add packed instructions for rv32 - part1

add the following categories

  * packed add/sub/pli instructions
  * packed cross instructions
  * packed absolute instructions
  * packed accumulation instructions
  * packed sign-extend and saturating instructions
  * packed shift instructions
  * packed compare instructions
  * packed pack instructions
  * packed basic arithmetic and data-move
  * packed multiply instructions
  * packed accumulate instructions
  * packed multiply-add instructions
  * RD-only element-wise register-pair

riscv/insn_template.h

@@ -7,6 +7,7 @@
 #include "internals.h"
 #include "specialize.h"
 #include "tracer.h"
+#include "p_ext_macros.h"
 #include "v_ext_macros.h"
 #include "debug_defines.h"
 #include <assert.h>

riscv/insns/aadd.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD((RS1 + RS2)>>1);

riscv/insns/aaddu.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD((0ULL + (uint32_t)RS1 + (uint32_t)RS2)>>1);

riscv/insns/abs.h

@@ -0,0 +1,4 @@
+require_extension('P');
+reg_t s1 = RS1;
+reg_t result = (int64_t(s1) < 0) ? -s1 : s1;
+WRITE_RD(sext_xlen(result));

riscv/insns/asub.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD((RS1 - RS2)>>1);

riscv/insns/asubu.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD((0ULL + (uint32_t)RS1 - (uint32_t)RS2)>>1);

riscv/insns/cls.h

@@ -0,0 +1,10 @@
+require_extension('P');
+reg_t x = xlen - 1;
+reg_t msb = (RS1 >> (xlen - 1)) & 1;
+for (int i = 0; i < xlen - 1; i++) {
+  if (msb != ((RS1 >> (xlen - i - 2)) & 1)) {
+    x = i;
+    break;
+  }
+}
+WRITE_RD(sext_xlen(x));

riscv/insns/macc_h00.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(RD + sext(RS1, 16) * sext(RS2, 16));

riscv/insns/macc_h01.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(RD + sext(RS1, 16) * sext(RS2 >> 16, 16));

riscv/insns/macc_h11.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(RD + sext(RS1 >> 16, 16) * sext(RS2 >> 16, 16));

riscv/insns/maccsu_h00.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(RD + sext(RS1, 16) * zext(RS2, 16));

riscv/insns/maccsu_h11.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(RD + sext(RS1 >> 16, 16) * zext(RS2 >> 16, 16));

riscv/insns/maccu_h00.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(RD + zext(RS1, 16) * zext(RS2, 16));

riscv/insns/maccu_h01.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(RD + zext(RS1, 16) * zext(RS2 >> 16, 16));

riscv/insns/maccu_h11.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(RD + zext(RS1 >> 16, 16) * zext(RS2 >> 16, 16));

riscv/insns/merge.h

@@ -0,0 +1,2 @@
+require_extension('P');
+WRITE_RD((RS2 & RD) | (RS1 & ~RD));

riscv/insns/mhacc.h

@@ -0,0 +1,4 @@
+require_extension('P');
+require_rv32;
+sreg_t mres = sext32(RS1) * sext32(RS2);
+WRITE_RD(RD + (mres >> 32));

riscv/insns/mhacc_h0.h

@@ -0,0 +1,4 @@
+require_extension('P');
+require_rv32;
+sreg_t mres = sext32(RS1) * sext32(P_FIELD(RS2, 0, 16));
+WRITE_RD(RD + (mres >> 32));

riscv/insns/mhacc_h1.h

@@ -0,0 +1,4 @@
+require_extension('P');
+require_rv32;
+sreg_t mres = sext32(RS1) * sext32(P_FIELD(RS2, 1, 16));
+WRITE_RD(RD + (mres >> 32));

riscv/insns/mhaccsu.h

@@ -0,0 +1,4 @@
+require_extension('P');
+require_rv32;
+sreg_t mres = sext32(RS1) * reg_t((uint32_t)RS2);
+WRITE_RD(RD + (mres >> 32));

riscv/insns/mhaccsu_h0.h

@@ -0,0 +1,4 @@
+require_extension('P');
+require_rv32;
+sreg_t mres = sext32(RS1) * (uint32_t)P_FIELD(RS2, 0, 16);
+WRITE_RD(RD + (mres >> 32));

riscv/insns/mhaccsu_h1.h

@@ -0,0 +1,4 @@
+require_extension('P');
+require_rv32;
+sreg_t mres = sext32(RS1) * (uint32_t)P_FIELD(RS2, 1, 16);
+WRITE_RD(RD + (mres >> 32));

riscv/insns/mhaccu.h

@@ -0,0 +1,4 @@
+require_extension('P');
+require_rv32;
+uint64_t mres = reg_t((uint32_t)RS1) * reg_t((uint32_t)RS2);
+WRITE_RD(RD + (mres >> 32));

riscv/insns/mhracc.h

@@ -0,0 +1,5 @@
+require_extension('P');
+require_rv32;
+sreg_t mres = sext32(RS1) * sext32(RS2);
+int32_t round = ((mres >> 31) + 1) >> 1;
+WRITE_RD(RD + round);

riscv/insns/mhraccsu.h

@@ -0,0 +1,5 @@
+require_extension('P');
+require_rv32;
+sreg_t mres = sext(RS1,64) * reg_t((uint32_t)RS2);
+int32_t round = ((mres >> 31) + 1) >> 1;
+WRITE_RD(RD + round);

riscv/insns/mhraccu.h

@@ -0,0 +1,5 @@
+require_extension('P');
+require_rv32;
+reg_t mres = reg_t((uint32_t)RS1) * reg_t((uint32_t)RS2);
+uint32_t round = ((mres >> 31) + 1) >> 1;
+WRITE_RD(RD + round);

riscv/insns/mqacc_h00.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(RD + (((int32_t)P_FIELD(RS1, 0, 16) * P_FIELD(RS2, 0, 16)) >> 15));

riscv/insns/mqacc_h01.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(RD + (((int32_t)P_FIELD(RS1, 0, 16) * P_FIELD(RS2, 1, 16)) >> 15));

riscv/insns/mqacc_h11.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(RD + (((int32_t)P_FIELD(RS1, 1, 16) * P_FIELD(RS2, 1, 16)) >> 15));

riscv/insns/mqracc_h00.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(RD + (((int32_t)P_FIELD(RS1, 0, 16) * P_FIELD(RS2, 0, 16) + 0x4000) >> 15));

riscv/insns/mqracc_h01.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(RD + (((int32_t)P_FIELD(RS1, 0, 16) * P_FIELD(RS2, 1, 16) + 0x4000) >> 15));

riscv/insns/mqracc_h11.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(RD + (((int32_t)P_FIELD(RS1, 1, 16) * P_FIELD(RS2, 1, 16) + 0x4000) >> 15));

riscv/insns/mseq.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(RS1 == RS2 ? -1 : 0);

riscv/insns/mslt.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD((int32_t)RS1 < (int32_t)RS2 ? -1 : 0);

riscv/insns/msltu.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD((uint32_t)RS1 < (uint32_t)RS2 ? -1 : 0);

riscv/insns/mul_h00.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(sext(RS1, 16) * sext(RS2, 16));

riscv/insns/mul_h01.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(sext(RS1, 16) * sext(RS2 >> 16, 16));

riscv/insns/mul_h11.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(sext(RS1 >> 16, 16) * sext(RS2 >> 16, 16));

riscv/insns/mulh_h0.h

@@ -0,0 +1,4 @@
+require_extension('P');
+require_rv32;
+int64_t mres = sext(RS1,64) * sext(P_FIELD(RS2, 0, 16),64);
+WRITE_RD(mres>>32);

riscv/insns/mulh_h1.h

@@ -0,0 +1,4 @@
+require_extension('P');
+require_rv32;
+int64_t mres = sext(RS1,64) * sext(P_FIELD(RS2, 1, 16),64);
+WRITE_RD(mres>>32);

riscv/insns/mulhr.h

@@ -0,0 +1,4 @@
+require_extension('P');
+require_rv32;
+int64_t mres = sext(RS1,64) * sext(RS2,64);
+WRITE_RD(((mres >> 31) + 1) >> 1);

riscv/insns/mulhrsu.h

@@ -0,0 +1,4 @@
+require_extension('P');
+require_rv32;
+sreg_t mres = sext(RS1,64) * reg_t((uint32_t)RS2);
+WRITE_RD(((mres >> 31) + 1) >> 1);

riscv/insns/mulhru.h

@@ -0,0 +1,4 @@
+require_extension('P');
+require_rv32;
+sreg_t mres = reg_t((uint32_t)RS1) * reg_t((uint32_t)RS2);
+WRITE_RD(((mres >> 31) + 1) >> 1);

riscv/insns/mulhsu_h0.h

@@ -0,0 +1,4 @@
+require_extension('P');
+require_rv32;
+sreg_t mres = sext32(RS1) * (uint32_t)P_FIELD(RS2, 0, 16);
+WRITE_RD(mres >> 32);

riscv/insns/mulhsu_h1.h

@@ -0,0 +1,4 @@
+require_extension('P');
+require_rv32;
+sreg_t mres = sext32(RS1) * (uint32_t)P_FIELD(RS2, 1, 16);
+WRITE_RD(mres >> 32);

riscv/insns/mulq.h

@@ -0,0 +1,7 @@
+require_extension('P');
+require_rv32;
+if ((RS1 != (reg_t)INT32_MIN) || (RS2 != (reg_t)INT32_MIN)) {
+    WRITE_RD((RS1 * RS2) >> 31);
+  } else {
+    WRITE_RD(INT32_MAX);
+}

riscv/insns/mulqr.h

@@ -0,0 +1,7 @@
+require_extension('P');
+require_rv32;
+if ((RS1 != (reg_t)INT32_MIN) || (RS2 != (reg_t)INT32_MIN)) {
+    WRITE_RD((((RS1 * RS2) >> 30) + 1) >> 1);
+  } else {
+    WRITE_RD(INT32_MAX);
+}

riscv/insns/mulsu_h00.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(sext(RS1, 16) * zext(RS2, 16));

riscv/insns/mulsu_h11.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(sext(RS1 >> 16, 16) * zext(RS2 >> 16, 16));

riscv/insns/mulu_h00.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(zext(RS1, 16) * zext(RS2, 16));

riscv/insns/mulu_h01.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(zext(RS1, 16) * zext(RS2 >> 16, 16));

riscv/insns/mulu_h11.h

@@ -0,0 +1,3 @@
+require_extension('P');
+require_rv32;
+WRITE_RD(zext(RS1 >> 16, 16) * zext(RS2 >> 16, 16));

riscv/insns/mvm.h

@@ -0,0 +1,2 @@
+require_extension('P');
+WRITE_RD((RS1 & RS2) | (RD & ~RS2));

riscv/insns/mvmn.h

@@ -0,0 +1,2 @@
+require_extension('P');
+WRITE_RD((RD & RS2) | (RS1 & ~RS2));

riscv/insns/paadd_b.h

@@ -0,0 +1,3 @@
+P_RD_RS1_RS2_LOOP(8,8,8, {
+  p_rd = (p_rs1 + p_rs2) >> 1;
+})

riscv/insns/paadd_h.h

@@ -0,0 +1,3 @@
+P_RD_RS1_RS2_LOOP(16,16,16, {
+  p_rd = (p_rs1 + p_rs2) >> 1;
+})

riscv/insns/paaddu_b.h

@@ -0,0 +1,3 @@
+P_RD_RS1_RS2_ULOOP(8,8,8, {
+  p_rd = (p_rs1 + p_rs2) >> 1;
+})

riscv/insns/paaddu_h.h

@@ -0,0 +1,3 @@
+P_RD_RS1_RS2_ULOOP(16,16,16, {
+  p_rd = (p_rs1 + p_rs2) >> 1;
+})

riscv/insns/paas_hx.h

@@ -0,0 +1,5 @@
+P_CROSS_LOOP(16, {
+  p_rd = (p_rs1 + p_rs2) >> 1;
+}, {
+  p_rd = (p_rs1 - p_rs2) >> 1;
+})

riscv/insns/pabd_b.h

@@ -0,0 +1,4 @@
+P_RD_RS1_RS2_LOOP(8, 8, 8, {
+  p_rd = (p_rs1 < p_rs2) ? (int8_t)((uint8_t)p_rs2 - (uint8_t)p_rs1)
+                          : (int8_t)((uint8_t)p_rs1 - (uint8_t)p_rs2);
+})

riscv/insns/pabd_h.h

@@ -0,0 +1,4 @@
+P_RD_RS1_RS2_LOOP(16, 16, 16, {
+  p_rd = (p_rs1 < p_rs2) ? (int16_t)((uint16_t)p_rs2 - (uint16_t)p_rs1)
+                          : (int16_t)((uint16_t)p_rs1 - (uint16_t)p_rs2);
+})

riscv/insns/pabdsumau_b.h

@@ -0,0 +1,3 @@
+P_REDUCTION_ULOOP(64, 8, true, false, {
+  p_res += (p_rs1 > p_rs2 ? p_rs1 - p_rs2 : p_rs2 - p_rs1);
+})

riscv/insns/pabdsumu_b.h

@@ -0,0 +1,3 @@
+P_REDUCTION_ULOOP(64, 8, false, false, {
+  p_res += (p_rs1 > p_rs2 ? p_rs1 - p_rs2 : p_rs2 - p_rs1);
+})

riscv/insns/pabdu_b.h

@@ -0,0 +1,3 @@
+P_RD_RS1_RS2_ULOOP(8, 8, 8, {
+  p_rd = (p_rs1 < p_rs2) ? p_rs2 - p_rs1 : p_rs1 - p_rs2;
+})

riscv/insns/pabdu_h.h

@@ -0,0 +1,3 @@
+P_RD_RS1_RS2_ULOOP(16, 16, 16, {
+  p_rd = (p_rs1 < p_rs2) ? p_rs2 - p_rs1 : p_rs1 - p_rs2;
+})

riscv/insns/pack.h

@@ -1,6 +1,7 @@
 // RV32Zbb contains zext.h but not general pack
 require(((xlen == 32) && (insn.rs2() == 0) && p->extension_enabled(EXT_ZBB))
-  || p->extension_enabled(EXT_ZBKB));
+  || p->extension_enabled(EXT_ZBKB)
+  || p->extension_enabled('P'));
 reg_t lo = zext_xlen(RS1 << (xlen/2)) >> (xlen/2);
 reg_t hi = zext_xlen(RS2 << (xlen/2));
 WRITE_RD(sext_xlen(lo | hi));

riscv/insns/padd_b.h

@@ -0,0 +1,3 @@
+P_RD_RS1_RS2_LOOP(8,8,8, {
+  p_rd = p_rs1 + p_rs2;
+})

riscv/insns/padd_bs.h

@@ -0,0 +1,3 @@
+P_RD_RS1_LOOP(8, 8, {
+  p_rd = p_rs1 + P_FIELD(RS2, 0, 8);
+})

riscv/insns/padd_h.h

@@ -0,0 +1,3 @@
+P_RD_RS1_RS2_LOOP(16, 16, 16, {
+  p_rd = p_rs1 + p_rs2;
+})

riscv/insns/padd_hs.h

@@ -0,0 +1,3 @@
+P_RD_RS1_LOOP(16, 16, {
+  p_rd = p_rs1 + P_FIELD(RS2, 0, 16);
+})

riscv/insns/pas_hx.h

@@ -0,0 +1,5 @@
+P_CROSS_LOOP(16, {
+  p_rd = p_rs1 + p_rs2;
+}, {
+  p_rd = p_rs1 - p_rs2;
+})

riscv/insns/pasa_hx.h

@@ -0,0 +1,5 @@
+P_CROSS_LOOP(16, {
+  p_rd = (p_rs1 - p_rs2) >> 1;
+}, {
+  p_rd = (p_rs1 + p_rs2) >> 1;
+})

riscv/insns/pasub_b.h

@@ -0,0 +1,3 @@
+P_RD_RS1_RS2_LOOP(8,8,8, {
+  p_rd = (p_rs1 - p_rs2) >> 1;
+})

riscv/insns/pasub_h.h

@@ -0,0 +1,3 @@
+P_RD_RS1_RS2_LOOP(16,16,16, {
+  p_rd = (p_rs1 - p_rs2) >> 1;
+})

riscv/insns/pasubu_b.h

@@ -0,0 +1,3 @@
+P_RD_RS1_RS2_ULOOP(8,8,8, {
+  p_rd = (p_rs1 - p_rs2) >> 1;
+})

riscv/insns/pasubu_h.h

@@ -0,0 +1,3 @@
+P_RD_RS1_RS2_ULOOP(16,16,16, {
+  p_rd = (p_rs1 - p_rs2) >> 1;
+})

riscv/insns/pli_b.h

@@ -0,0 +1,3 @@
+P_RD_LOOP(8, {
+  p_rd = insn.p_imm8();
+})

riscv/insns/pli_db.h

@@ -0,0 +1,4 @@
+require_rv32;
+P_RD_DW_LOOP(8, {
+  p_rd = insn.p_imm8();
+})

riscv/insns/pli_dh.h

@@ -0,0 +1,4 @@
+require_rv32;
+P_RD_DW_LOOP(16, {
+  p_rd = (insn.p_imm10csl() & 0x200) ? (0xfc00 | insn.p_imm10csl()) : insn.p_imm10csl();
+})

riscv/insns/pli_h.h

@@ -0,0 +1,3 @@
+P_RD_LOOP(16, {
+  p_rd = (insn.p_imm10csl() & 0x200) ? (0xfc00 | insn.p_imm10csl()) : insn.p_imm10csl();
+})

riscv/insns/plui_dh.h

@@ -0,0 +1,4 @@
+require_rv32;
+P_RD_DW_LOOP(16, {
+  p_rd = insn.p_imm10csr();
+})

riscv/insns/plui_h.h

@@ -0,0 +1,3 @@
+P_RD_LOOP(16, {
+  p_rd = insn.p_imm10csr();
+})

riscv/insns/pm2add_h.h

@@ -0,0 +1,3 @@
+P_REDUCTION_LOOP(32, 16, false, false, {
+  p_res += p_rs1 * p_rs2;
+})

riscv/insns/pm2add_hx.h

@@ -0,0 +1,3 @@
+P_REDUCTION_CROSS_LOOP(32, 16, false, false, {
+  p_res += p_rs1 * p_rs2;
+})

riscv/insns/pm2adda_h.h

@@ -0,0 +1,3 @@
+P_REDUCTION_LOOP(32, 16, true, false, {
+  p_res += p_rs1 * p_rs2;
+})

riscv/insns/pm2adda_hx.h

@@ -0,0 +1,3 @@
+P_REDUCTION_CROSS_LOOP(32, 16, true, false, {
+  p_res += p_rs1 * p_rs2;
+})

riscv/insns/pm2addasu_h.h

@@ -0,0 +1,3 @@
+P_REDUCTION_SULOOP(32, 16, true, false, {
+  p_res += p_rs1 * p_rs2;
+})

riscv/insns/pm2addau_h.h

@@ -0,0 +1,3 @@
+P_REDUCTION_ULOOP(32, 16, true, false, {
+  p_res += p_rs1 * p_rs2;
+})

riscv/insns/pm2addsu_h.h

@@ -0,0 +1,3 @@
+P_REDUCTION_SULOOP(32, 16, false, false, {
+  p_res += p_rs1 * p_rs2;
+})

riscv/insns/pm2addu_h.h

@@ -0,0 +1,3 @@
+P_REDUCTION_ULOOP(32, 16, false, false, {
+  p_res += p_rs1 * p_rs2;
+})

riscv/insns/pm2sadd_h.h

@@ -0,0 +1,3 @@
+P_REDUCTION_LOOP(32, 16, false, true, {
+  p_res += p_rs1 * p_rs2;
+})

riscv/insns/pm2sadd_hx.h

@@ -0,0 +1,3 @@
+P_REDUCTION_CROSS_LOOP(32, 16, false, true, {
+  p_res += p_rs1 * p_rs2;
+})

riscv/insns/pm2sub_h.h

@@ -0,0 +1,6 @@
+P_REDUCTION_LOOP(32, 16, false, false, {
+  if (j & 1)
+    p_res -= p_rs1 * p_rs2;
+  else
+    p_res += p_rs1 * p_rs2;
+})

riscv/insns/pm2sub_hx.h

@@ -0,0 +1,6 @@
+P_REDUCTION_CROSS_LOOP(32, 16, false, false, {
+  if (j & 1)
+    p_res -= p_rs1 * p_rs2;
+  else
+    p_res += p_rs1 * p_rs2;
+})

riscv/insns/pm2suba_h.h

@@ -0,0 +1,6 @@
+P_REDUCTION_LOOP(32, 16, true, false, {
+  if (j & 1)
+    p_res -= p_rs1 * p_rs2;
+  else
+    p_res += p_rs1 * p_rs2;
+})

riscv/insns/pm2suba_hx.h

@@ -0,0 +1,6 @@
+P_REDUCTION_CROSS_LOOP(32, 16, true, false, {
+  if (j & 1)
+    p_res -= p_rs1 * p_rs2;
+  else
+    p_res += p_rs1 * p_rs2;
+})

riscv/insns/pm4add_b.h

@@ -0,0 +1,3 @@
+P_REDUCTION_LOOP(32, 8, false, false, {
+  p_res += p_rs1 * p_rs2;
+})

riscv/insns/pm4adda_b.h

@@ -0,0 +1,3 @@
+P_REDUCTION_LOOP(32, 8, true, false, {
+  p_res += p_rs1 * p_rs2;
+})

riscv/insns/pm4addasu_b.h

@@ -0,0 +1,3 @@
+P_REDUCTION_SULOOP(32, 8, true, false, {
+  p_res += p_rs1 * p_rs2;
+})

riscv/insns/pm4addau_b.h

@@ -0,0 +1,3 @@
+P_REDUCTION_ULOOP(32, 8, true, false, {
+  p_res += p_rs1 * p_rs2;
+})