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riscv-isa-sim
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Don't include PTE.N bit as part of the PPN

pull/602/head
Andrew Waterman 6 years ago
parent
ec00b9bc69
commit
e2e83c0604
1 changed files with 2 additions and 2 deletions
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  1. 4
      riscv/mmu.cc

4
riscv/mmu.cc
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@ -324,7 +324,7 @@ reg_t mmu_t::s2xlate(reg_t gva, reg_t gpa, access_type type, access_type trap_ty
} }
reg_t pte = vm.ptesize == 4 ? from_target(*(target_endian<uint32_t>*)ppte) : from_target(*(target_endian<uint64_t>*)ppte); reg_t pte = vm.ptesize == 4 ? from_target(*(target_endian<uint32_t>*)ppte) : from_target(*(target_endian<uint64_t>*)ppte);
reg_t ppn = pte >> PTE_PPN_SHIFT; reg_t ppn = (pte & ~reg_t(PTE_N)) >> PTE_PPN_SHIFT;
if (PTE_TABLE(pte)) { // next level of page table if (PTE_TABLE(pte)) { // next level of page table
base = ppn << PGSHIFT; base = ppn << PGSHIFT;
@ -404,7 +404,7 @@ reg_t mmu_t::walk(reg_t addr, access_type type, reg_t mode, bool virt, bool mxr)
throw_access_exception(addr, type); throw_access_exception(addr, type);
reg_t pte = vm.ptesize == 4 ? from_target(*(target_endian<uint32_t>*)ppte) : from_target(*(target_endian<uint64_t>*)ppte); reg_t pte = vm.ptesize == 4 ? from_target(*(target_endian<uint32_t>*)ppte) : from_target(*(target_endian<uint64_t>*)ppte);
reg_t ppn = pte >> PTE_PPN_SHIFT; reg_t ppn = (pte & ~reg_t(PTE_N)) >> PTE_PPN_SHIFT;
if (PTE_TABLE(pte)) { // next level of page table if (PTE_TABLE(pte)) { // next level of page table
base = ppn << PGSHIFT; base = ppn << PGSHIFT;

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